RDC
®
RISC DSP Controller
R8810LV
RDC Semiconductor Co.
Rev:1.2
Subject to change without notice
24
Bit 15- 0
:
RC
,Reset Configuration AO15-AO8, AD7-AD0 .
The (AO15 to AO8, AD7 to AD0) must with weakly pull-up or pull-down resistors to correspond the contents when (AO15
to AO8, AD7 to AD0) be latched into this register during the RST pin from low go high. And the value of the reset
configuration register provides the system information when software read this register. This register is read only and the
contents remain valid until the next processor reset.
Reset Configuration Register
Offset : F6h
0
Reset Value : AD15-AD0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RC
CLKOUTA
A19-A0
S6
AD7-AD0
ALE
BHE
RD
DEN
S2-S0
ffff0
f0
7
4
7
4
min 7T
UCS
ea
Reset Status
(float)
(input)
(input)
(float)
(float)
(float)
(float)
(float)
DT/R
(input)
(input)
RST
ff
(input)
AO15-AO8