1257 User Manual
SCPI Command Basics 5-20
EADS North America Defense
Test and Services, Inc.
©
2001
NOTE:
When bit 7 of the status byte (Service Requested) is set to
show that SRQ is asserted, the 1257 will not respond to any
GPIB commands until the interrupt has been serviced.
Servicing may be done with a serial poll. After the interrupt
has been serviced, the error code generated must be obtained
via GPIB.
Bits 6 and 7 are cleared after each Serial Poll Enable (SPE)
command. Bit 5 is cleared by sending instructions to the 1257, and
is set when the 1257 finishes executing a command. These
transitions coincide with the rising and falling edges, respectively,
of the
External Trigger Out
signal. All status bits are active-high.
*TRG Command
The *TRG command is required by the IEEE-488.2 specification. If
the 1257 is armed (see the INIT:IMMEDIATE and
INIT:CONTINUOUS commands), and the trigger source is “BUS”
(see the TRIGGER:SOURCE command), then this will cause the
next scan list action to occur.
This is equivalent to sending a GPIB bus trigger.
*WAI Command
The *WAI command is required by the IEEE-488. 2 specification.
This command is accepted but has no effect on the 1257.
SCPI Status
Registers
SCPI defines two additional registers beyond those shown in
Figure 5-1
. These are the
Operation Status Register
and the
Questionable Status Register
.
The
Operation Status Register
consists of three logical registers: a
condition register, an enable register, and an event register.
The
Operation Status Condition Register
holds the present
condition of various instrument attributes. This register is a set of
1-bit flags. The conditions assigned to the bits of the register are
shown below:
Waiting For Arm
Bit 6, Bit weight = 64 decimal = 40
hexadecimal
This bit is set when a Scan List has been defined, but the
1257 is not armed. Use the INIT:IMMEDIATE or
INIT:CONTINUOUS command to arm the 1257.
Summary of Contents for 1257
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