Racal Instruments 1257, Manual

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1257 User Manual
SCPI Command Basics 5-12 EADS North America Defense
Test and Services, Inc.
©
2001
(Status Byte bit 0 AND SRE bit 0)
OR
(Status Byte bit 1 AND SRE bit 1)
OR
(Status Byte bit 2 AND SRE bit 2)
OR
(Status Byte bit 3 AND SRE bit 3)
OR
(Status Byte bit 4 AND SRE bit 4)
OR
(Status Byte bit 5 AND SRE bit 5)
OR
(Status Byte bit 7 AND SRE bit 7)
where the SRE is the Service Request Enable Register .
ESB Event Summary Bit
Bit 5, bit weight = 32 decimal = 20 hexadecimal
This bit is set when one of the enabled Standard
Event Status Enable Register bits is set. The previous
paragraphs describe the formation of the ESB bit.
MAV Message Available
Bit 4, bit weight = 16 decimal = 10 hexadecimal
This bit is set when there is a message in the output
buffer of the 1257.
All other bits (3, 2, 1, and 0) of the Status Byte are not assigned
and will always return 0.
When the MSS transitions from a 0 to a 1, the GPIB SRQ interrupt
is generated. The MSS will remain 1 until all enabled bits of the
Status Byte have returned to 0.