Rabbit 6000 User’s Manual
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285
25. 10/100B
ASE
-T E
THERNET
25.1 Overview
Network Port B implements a full 10/100Base-T Ethernet MAC and PHY; no external PHY chip
is required. The MAC is fully compliant with the IEEE 802.3 Ethernet standard, including support
for auto-negotiation, link detection, multicast filtering, and broadcast addresses. A wide variety of
transmit and receive options is available, including control over frame size, CRC attachment, max-
imum allowed frame size, and interpacket gap length. The receiver and transmitter each have a
dedicated 2048-byte FIFO.
The Network Port B receiver transfers both data and status information to memory via the DMA,
eliminating the need for receive data or status interrupts and dedicated receive status registers. The
network port appends six bytes of status information to the last byte of the received data. Buffer
and byte counts in the DMA can be used to find this status information in memory. In cases where
a received frame has been discarded because of an error, only these six bytes of status will be
transferred to memory. The DMA must be programmed to close a buffer on end-of-frame, as the
network port marks the last byte of status this way.
The Network Port B transmitter uses interrupts because the DMA has no way of knowing when
(or if) the frame has successfully been sent. Both the receive and transmit FIFOs are capable of
DMA fly-by operation.
The network port requires an accurate 25 MHz clock to generate the 100 Mbit/s serial rate of
100Base-T. This clock can come from dedicated pins in the PHY interface, or from the main clock
if a 25 MHz input is used. The clock for the network port may also be disabled to conserve power.
The network port transmitter precedes the transmit data automatically with a preamble and start-
frame-delimiter, and appends CRC and the end-frame delimiter after the last byte. Frame trans-
mission starts automatically once the transmit FIFO load is completed and any interframe gap
time or back-off time has expired. Transmission is aborted if a collision is detected, and is retried
up to 16 times using the standard random back-off time algorithm. Detection of a collision causes
the transmitter to send a 32-bit “jam” pattern of all ones to guarantee that all receivers in the net-
work recognize the collision.
The network port receiver uses the received preamble to synchronize to the phase of the incoming
frame, and then waits for the start-frame delimiter. Character assembly begins at this point, and
each byte is transferred to the receive FIFO. However, no interrupt or DMA request will occur
until after the first six bytes of the frame have been received and checked for an address match.
Summary of Contents for 6000
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