The solution was to change it to 0.33uF and a proper low loss NP0 type with Class-I dielectric,
which is a not-too-expensive high voltage capacitor at DigiKey, and has low enough loss not to
dissipate power and overheat.
This is the reason why both C15 and C17 are 0.33uF capacitors.
The forward bias current in D7 is determined here by R13 (470-ohms) is 25mA at 12V, rising to
42mA at 20V supply. That’s plenty to ensure that to give a very low insertion loss, so minimal
power is wasted when the switch is “ON”. Again, when the switch is OFF, 12V-20V supply voltage
as reverse bias is plenty more than enough, more than any signal we are expecting to receive on
the antenna.
The incoming “PTT” signal is designed to switch with 0V for Receive, +5V for transmit.
During Transmit, transistor Q6 gate is 5V, which switches MOSFET Q6 On. That pulls the “B”
signal sent to SW1 to 0V; it also pulls the forward bias current through D7. At the same time, this
0V turns on the P-type MOSFET Q4 (IRFU9024), which then passes the supply voltage to the
SW1 “A” signal, and also pushes forward bias current through D7 via 470-ohm resistor R13. This
creates the proper forward bias current conditions for switches SW1 and SW3 to be ON.
During Receive, transistor Q6 gate is 0V, and this switches MOSFET Q6 Off. P-channel MOSFET
Q4 is then also Off, because its gate voltage becomes 12V-20V (supply) via R10. The supply
voltage also feeds into the SW1 “B” signal to apply reverse bias to SW1 diode, and also applies
reverse bias voltage to D7 via the resistor R11. Meanwhile the SW1 “A” signal and the D7 diode
anode are pulled to 0V by resistor R7, which is a 10K resistor to ground – it is not shown in this
schematic fragment but you can see it in the top center of the complete schematic (see previous
sections). Anyway, during Receive this creates the proper 12V reverse bias conditions in the SW1
and SW3 switches, diodes D1 and D7 respectively, so that they are “OFF”.
Now we come to the most complex of the “switches”, SW2 (in my block diagram above), which is
the Receive bypass switch.
This is a very interesting part of
the circuit.
Not shown on this fragment (but
are shown on the main
complete schematic) are the
usual DC blocking capacitors,
in this case C1 and C16 (both
1uF).
Now there are two diodes
making up the switch, which are
D3 and D5 (both 1N4007).
Why two? Because as I
mentioned somewhat
previously, a substantial off
isolation is required here, to
ensure that under all
circumstances there is not
enough leakage through the
switch to create a positive
feedback loop which creates
spurious self-oscillation of the
50W QCX PA kit assembly
1.00q
58
