Princeton Instruments PI-MAX 3 System, Manual, Page: 136 / 150

136 PI-MAX
®
3 System Manual Version 1.A
be reduced by cooling the intensifier (or environment) and is usually negligible in
gated applications.
Exposure Time: The period during which the camera allows incoming signal to integrate
on the CCD array. For signal to be detected and integrated on the CCD array, it must
both fall in a valid gate width and in a valid exposure time. In
Gate Mode , the
exposure time is determined by an internal pulse ensemble defined by the internal
timing generator gating setup.
External Sync: Readout synchronization mode where the CCD array is synchronized to
an external source, i.e., the array is scanned upon arrival of an external trigger pulse.
External Trigger mode: Trigger mode where gate pulses are delayed from external
input trigger pulses. Also a detector readout synchronization mode where the detector
is scanned continuously but data storage does not begin until the arrival of an
external trigger pulse.
Frame: The area of the CCD array that is readout after an exposure time ends. For a
1024x1024 array, a full frame would consist of the entire 1024X1024 pixel area. In
the WinX/32 software, the number of frames to be acquired during a data acquisition
is determined by the Number of Images (or Number of Spectra) parameter on the
Experiment Setup|Main
tab page. If the parameter value is greater than 1,
multiple frames of data will be acquired and stored in a single data file.
Frame Rate (fps): The number of frames that can be readout per second. The effective
frame rate can be increased by defining a Region of Interest (ROI) that is smaller
than the full-frame size. This means that a selected portion of the image can be
displayed and the remainder of the accumulated charge discarded. The frame rate
generally increases with reduction in the size of the detected area. For example, a
CCD with a sensor size of 1000 x 1000 and an output rate of ten frames/second can
produce 100 frames/second if the read-out region is reduced to 100 x 100 pixels.
Full-Well Capacity: The number of electrons that can be stored in a pixel. The smaller
the pixel, the fewer electrons can be stored; therefore, either the exposure times need
to be shorter or the signal intensity must be lower. Note that binning relies on the
full-well capacity of the pixels in the serial shift register and of the output node.
Typically, a serial shift register pixel has a full-well capacity that is 2 times greater
than that of an image pixel and the output node has a full-well capacity that is about
1.5-2 times greater than that of a serial register pixel.
FWHM: Full width half-maximum. Time period from the mid-point of the leading edge
to the mid-point of the trailing edge of the gate pulse. Used to describe pulse width.
Gate Delay: The time between the beginning of the trigger pulse (either internal or
external) and the beginning of the photocathode gate pulse.
Gate Mode: PI-MAX3 intensifier mode in which the photocathode is biased on only for
the time that each gate pulse is applied. In this way, the array can be exposed to
multiple images during a single exposure time. As a result, the tolerance to room
light is higher in gated operation, but the risk of damaging overload from intense
light sources such as lasers remains. In fact, intense light sources in gated
experiments can cause spot damage that would be undetected by the alarm circuit.
Gate Width: The time during which light will be detected by the intensifier, intensified,
and applied to the CCD. Basically, the intensifier controls what the chip 'sees' during