UPS PIco HV3.0A Firmware Code 040 Print Date 18.08.2017
Designed and Manufactured by PiModules and ModMyPi
www.pimodules.com www.modmypi.com
Example of use
sudo i2cget -y 1 0x69 0x14
w
should
return value of the aEXT0level
sudo i2cget -y 1 0x69 0x16
w
should
return value of the aEXT1level
sudo i2cget -y 1 0x69 0x18
w
should
return value of the aEXT2level
sudo i2cset -y 1 0x6b 0x08 0x00
sets all A/D readings to pre sacled 0-5.2V (default)
sudo i2cset -y 1 0x6b 0x08 0xff
sets all A/D readings to raw data (0x0000-0x0fff)
Registers Located at 0x69 I2C address related to A/D readings
0x14
aEXT0level
Word
Mirror
Read
Means value of the first A/D converter pre scaled to
5.2V. Higher voltage could not be supplied. Readings
are in 10
th
of mV in BCD format
0x16
aEXT1level
Word
Mirror
Read
Means value of the second A/D converter pre scaled to
5.2V. Higher voltage could be supplied with an external
resistor divider. Readings are in 10
th
of mV in BCD
format.
If added an extra resistor can be used as pre
scaled to 10, 20 or 30V.
0x18
aEXT2level
Word
Mirror
Read
Means value of the second A/D converter pre scaled to
5.2V. Higher voltage could be supplied with an external
resistor divider. Readings are in 10
th
of mV in BCD
format.
If added an extra resistor can be used as pre
scaled to 10, 20 or 30V.
Registers Located at 0x6B I2C address related to A/D settings
0x08
setA_D
Byte
Common
R/W
Defines the pre scaler of the
AEXT1level
and the
AEXT2level
registers.
The 4
th
MSB bits are responsible for the
AEXT1level
pre-scale, and the 4
th
LSB bits are responsible for the
AEXT2level
pre-scale.
Read:
Anytime, Return actual
setA_D
value
Write:
0x00
–
5.2V prescale for the
AEXT2level
Write:
0x01
–
10V prescale for the
AEXT2level
Write:
0x02
–
20V prescale for the
AEXT2level
Write:
0x03
–
30V prescale for the
AEXT2level
Write:
0x00
–
5.2V prescale for the
AEXT1level
Write:
0x10
–
10V prescale for the
AEXT1level
Write:
0x20
–
20V prescale for the
AEXT1level
Write:
0x30
–
30V prescale for the
AEXT1level
Write:
0xFF
–
all A/D registers will contain raw data
RED Marked
–
not implemented yet
