CP302
Introduction
ID 21112, Rev. 05
Page 1 - 6
®
PEP Modular Computers GmbH
1.5 CP302 Main Specifications
Table 1-1: CP302 Main Specifications
CP302
Specifications
CPU
Intel
Mobile Pentium
III Coppermine™ processor up to 700 MHz
with 256 kB L2 on-die cache in 495 BGA2 packaging
Memory
100 MHz system memory bus
256 kB L2 on-die full speed processor cache
64 MB up to 128 MB SDRAM via one SODIMM socket running at
100 MHz
64 up to 128 MB SDRAM soldered with ECC running at 100 MHz
512 kB Flash (or optional SRAM with 256 kB or 512 kB)
Optional DiskOnChip™ module up to 96 MB
2 x 256 byte EEPROM for storing CMOS data when operating
without battery and 2 x 256 byte EEPROM for user purposes
Super I/O
The FDC37C672 from SMSC is an ISA Plug and Play compatible I/O
device that provides the following functions:
- Two 16C550 compatible UARTs with 16 bytes FIFO
- PS/2 keyboard and mouse interface
- Floppy disk controller up to 2.88 MB
- Parallel port ECP/EPP compatible
Chipset
Intel
82440BX PCI/AGP controller
- GTL processer interface
- Integrated DRAM controller
- AGP and PCI interface
Intel
82371EB PCI/ISA EIDE Xcelerator (PIIX4E)
- Multifunction PCI to ISA bridge
- Enhanced DMA controller
- Interrupt controller based on two 82C59’s
- Timer based on 82C84
- Real-time clock
- Power management logic
- Supports two USB interfaces
- Supports two EIDE interfaces
AGP/VGA
interface
Controller: 69030
Video memory: 4 MB
Resolution: up to 1600x1200x16 bits per pixel @ 60 Hz
Fast Ethernet
Interface
Controller: Intel
82559 Fast Ethernet Controller
Data Rate: 10 & 100 MBit/s
Ethernet: Full 802.2 & 802.3 IEEE compliance supporting 10Base-T
and 100Base-TX
Cabling: Category 5 two-pair cabling
Software
Support
Award BIOS with Preboot Agent contained within 256 kB of Flash
memory. The BIOS parameters are saved in the EEPROM.
The CP302 is able to operate without disks, keyboard and video
operating systems:
Linux
, QNX
, VxWorks
, Windows NT
etc.
MS-DOS
, Windows 95
, 98
, Windows 2000
CompactPCI Bus
Interface
Compatible with CompactPCI Specification V 2.0, Rev. 3.0
64-bit/33 MHz master interface 3.3V/5.0V compatible
Table continued on following page
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