3-12
Operations Manual: HPAC-100/125/150/200/250-RM SSPA
3 Operation of Stand-Alone Unit
Figure 3-5: Example of I/O card and processor card DIP switches.
Table 3-6: DIP switch functions.
User Configurable DIP Switches
The user must access only a portion of the DIP switches for setting the system address,
the baud rate, and enabling / configuring the parallel port. Table 3-7 shows the default
positions of the user configurable DIP switches. Table 3-8 illustrates the system ad-
dress selections, Table 3-9 illustrates the system baud rate selections, Table 3-16
illustrates the parallel port enable selections, Table 3-19 illustrates the parallel port
configuration and Tables 3-10 to 3-15, 3-17, 3-18, and 3-20 illustrate factory selections.
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1 2 3 4 5 6 7 8
OFF
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S5
S7
OFF
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S6
I/O board DIP switches
OPEN (OFF)
1 2 3 4 5 6 7 8
SW1
Processor board DIP switch
Summary of Contents for HPAC-100-RM
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