15
Circuit Diagrams and Ladder Programs
Section 2-1
2-1-4
Memory Area Differences between Versions
The following table shows the differences between different models
and different versions with respect to the memory areas that can be
used.
Symbol
Name
Bit number (See note 1.)
ZEN-
20C
@@@
-
@
-V2
ZEN-
10C
@@@
-
@
-V2
ZEN-
20C
@@@
-
@
-V1
ZEN-
10C
@@@
-
@
-V1
ZEN-
10C
@@@
-
@
I
CPU Unit input bits
0 to b (12
bits)
0 to 5 (6
bits)
0 to b (12
bits)
0 to 5 (6
bits)
0 to 5 (6
bits)
Q
CPU Unit output bits
0 to 7 (8
bits)
0 to 3 (4
bits) (See
note 5.)
0 to 7 (8
bits)
0 to 3 (4
bits)
0 to 3 (4
bits)
X
Expansion I/O Unit
input bits (See note
2.)
0 to b (12 bits max.)
Y
Expansion I/O Unit
output bits (See note
2.)
0 to b (12 bits max.)
M
Work bits
0 to f (16 bits)
H
Holding bits
0 to f (16 bits)
B
Button input bits
(See note 3.)
0 to 7 (8 bits)
A
Analog comparator
bits (See note 4.)
0 to 3 (4 bits)
P
Timer/counter
comparator bits
0 to f (16 bits)
T
Timers
0 to f (16 timers)
0 to 7
(8 timers)
#
Holding timers
0 to 7 (8 timers)
0 to 3
(4 timers)
C
Counters
0 to f (16 counters)
0 to 7
(8 counter
s)
@
Weekly timers (See
note 3.)
0 to f (16 timers)
0 to 7
(8 timers)
∗
Calendar timers
(See note 3.)
0 to f (16 timers)
0 to 7
(8 timers)
D
Display bits (See
note 3.)
0 to f (16 bits)
0 to 7
(8 bits)
F
8-digit counter
0 (1 counter)
---
G
8-digit comparator
bits
0 to 3 (4 bits)
---
Z184-E1-04.book Page 15 Thursday, November 20, 2008 4:25 PM
