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OPERATION MANUAL

C200H

(CPU01-E/03-E/11-E)

SYSMAC
Programmable Controllers

Cat. No. W130-E1-05

Summary of Contents for SYSMAC C200H

Page 1: ...OPERATION MANUAL C200H CPU01 E 03 E 11 E SYSMAC Programmable Controllers Cat No W130 E1 05 ...

Page 2: ...C200H Programmable Controllers CPU01 E 03 E 11 E Operation Manual Revised June 2003 ...

Page 3: ...iv ...

Page 4: ...ans word and is abbreviated Wd in documentation in this sense The abbreviation PC means Programmable Controller and is not used as an abbreviation for any thing else Visual Aids The following headings appear in the left column of the manual to help you locate different types of information Note Indicates information of particular interest for efficient and convenient operation of the product 1 2 3...

Page 5: ...vi ...

Page 6: ...TION 3 Memory Areas 15 3 1 Introduction 16 3 2 Data Area Structure 16 3 3 IR Internal Relay Area 18 3 4 SR Special Relay Area 20 3 5 AR Auxiliary Relay Area 32 3 6 DM Data Memory Area 38 3 7 HR Holding Relay Area 40 3 8 TC Timer Counter Area 40 3 9 LR Link Relay Area 41 3 10 Program Memory 42 3 11 TR Temporary Relay Area 42 SECTION 4 Writing and Inputting the Program 43 4 1 Basic Procedure 44 4 2 ...

Page 7: ... Control 187 5 21 Step Instructions 193 5 22 Special Instructions 202 5 23 SYSMAC NET Link SYSMAC LINK Instructions 211 SECTION 6 Program Execution Timing 219 6 1 Cycle Time 220 6 2 Calculating Cycle Time 226 6 3 Instruction Execution Times 228 6 4 I O Response Time 234 SECTION 7 Program Monitoring and Execution 237 7 1 Monitoring Operation and Modifying Data 238 7 2 Program Backup and Restore Ope...

Page 8: ...TABLE OF CONTENTS ix Glossary 345 Index 363 Revision History 369 ...

Page 9: ...oints It also provides information on System DM a special area in C200H PCs that provides the user with flexible control of PC operating parameters Section 4 Writing and Entering Programs explains the basics of ladder diagram programming looking at the elements that make up the parts of a ladder diagram program and explaining how exe cution of this program is controlled It also explains how to con...

Page 10: ...s section is important for the safe and reliable application of the Programmable Con troller You must read this section and understand the information contained before attempting to set up or operate a PC system 1 Intended Audience xiv 2 General Precautions xiv 3 Safety Precautions xiv 4 Operating Environment Precautions xv 5 Application Precautions xv ...

Page 11: ...and for reference during operation WARNING It is extremely important that a PC and all PC Units be used for the specified purpose and under the specified conditions especially in applications that can directly or indirectly affect human life You must consult with your OMRON representative before applying a PC system to the above mentioned applications 3 Safety Precautions WARNING Do not attempt to...

Page 12: ...cations subject to static electricity or other forms of noise Locations subject to strong electromagnetic fields Locations subject to possible exposure to radioactivity Locations close to power supplies Caution The operating environment of the PC system can have a large effect on the lon gevity and reliability of the system Improper operating environments can lead to malfunction failure and other ...

Page 13: ...are tightened to the torque specified in this manual Incorrect tighten ing torque may result in malfunction Leave the label attached to the Unit when wiring Removing the label may re sult in malfunction if foreign matter enters the Unit Remove the label after the completion of wiring to ensure proper heat dissipa tion Leaving the label attached may result in malfunction Double check all wiring and...

Page 14: ... confirm that the rating of a new part is correct Not doing so may result in malfunction or burning Before touching a Unit be sure to first touch a grounded metallic object in order to discharge any static built up Not doing so may result in malfunction or dam age ...

Page 15: ... used with OMRON PCs Descriptions of peripheral devices used with the C200H and a table of other manuals available to use with this manual for special PC applications are also provided 1 1 Overview 2 1 2 The Origins of PC Logic 2 1 3 PC Terminology 3 1 4 OMRON Product Terminology 4 1 5 Overview of PC Operation 4 1 6 Peripheral Devices 5 1 7 Available Manuals 7 1 8 LSS Capabilities 8 1 8 1 Offline ...

Page 16: ...would be required i e How does the PC know when to activate each pusher Much more complicated operations however are also possible The problem is how to get the desired control signals from available inputs at appropriate times To achieve proper control the C200H uses a form of PC logic called ladder diagram programming This manual is written to explain ladder diagram pro gramming and to prepare t...

Page 17: ...int is allocated a location in memory that reflects its status i e either ON or OFF This mem ory location is called an input bit The CPU in its normal processing cycle monitors the status of all input points and turns ON or OFF corresponding input bits accordingly There are also output bits in memory that are allocated to output points on Units through which output signals are sent to output devic...

Page 18: ...st have a reasonable idea of the required information for steps one and two which are discussed briefly below This manual is written to explain steps three through six eight and nine The relevant sections of this manual that provide more information are listed with each of these steps 1 2 3 1 Determine what the controlled system must do in what order and at what times 2 Determine what Racks and wh...

Page 19: ...etween them For instance a photoelectric switch might be functionally tied to a motor by way of a counter within the PC When the PC receives an input from a start switch it could start the motor The PC could then stop the motor when the counter has received a specified number of input signals from the photoelec tric switch Each of the related tasks must be similarly determined from the beginning o...

Page 20: ... to interface a computer running LSS to the PC Using an Optical Host Link Unit also en ables the use of optical fiber cable to connect the FIT to the PC Wired Host Link Units are available when desired Although FIT does not have optical connectors conversion to optical fiber cable is possible by using converting Link Adapters The FIT is an OMRON computer with specially designed software that allow...

Page 21: ...al W135 Information on building a PC Link System to automatically transfer data between PCs Host Link System Manual SYSMAC WAY W143 Information on building a Host Link System to manage PCs from a host computer SYSMAC NET Link Unit Operation Manual W114 Information on building a SYSMAC NET Link System and thus create an optical LAN integrating PCs with computers and other peripheral devices SYSMAC ...

Page 22: ... all or part of the user program to a data disk RETRIEVE PROGRAM Retrieves all or part of the user program from on a data disk CHANGE DISPLAY Switches the display between four display modes Ladder Ladder with Comments Mnemonic 1 function key and numeric key input mode and Mnemonic 2 alphanumeric key input mode SEARCH INSTRUCTION Searches for instructions including specified operands I O COMMENT Cr...

Page 23: ...om data disk files 1 8 2 Online Operations Group Function name Description ON LINE MONITOR DATA Used to monitor up to 20 bits words during program execution The status of bits and contents of words being monitored can also be controlled TRANSFER PROGRAM Transfers and compares the user program between the LSS and PC ON LINE EDIT Edits the PC program during MONITOR mode execution READ CYCLE TIME Rea...

Page 24: ...uding network and interface settings and disk drive comment printer PROM Writer and monitor settings It also provides settings for trans fer of I O table and data link tables to UM FILE MANAGEMENT FILE MANAGEMENT operations include basic file management features so that files can be manipulated directly from the LSS It also provides a feature for merging program files LSS Capabilities Section 1 8 ...

Page 25: ...n on hardware aspects of the C200H that are relevant to programming and software op eration These include indicators on the CPU Unit and basic PC configuration This information is covered in detail in the C200H Installation Guide 2 1 Indicators 12 2 2 PC Configuration 12 ...

Page 26: ... 2 2 PC Configuration The basic PC configuration consists of two types of Rack a CPU Rack and Expansion I O Racks The Expansion I O Racks are not a required part of the basic system They are used to increase the number of I O points An illustra tion of these Racks is provided in 3 3 IR Area A third type of Rack called a Slave Rack can be used when the PC is provided with a Remote I O Sys tem A C20...

Page 27: ...ts Remote I O Master Units PC and Host Link Units can be mounted to any slot on all other Racks although mounting to the two rightmost slots on the CPU Rack may interfere with the mounting of peripher al devices With the CPU11 E CPU Unit SYSMAC LINK and NET Link Units can be mounted to the two rightmost slots on the CPU Rack Refer to the C200H Installation Guide for details about which slots can b...

Page 28: ...Bit 29 3 4 6 FAL Failure Alarm Area 30 3 4 7 Low Battery Flag 30 3 4 8 Cycle Time Error Flag 30 3 4 9 I O Verification Error Flag 30 3 4 10 First Cycle Flag 30 3 4 11 Clock Pulse Bits 30 3 4 12 Step Flag 31 3 4 13 Instruction Execution Error Flag ER 31 3 4 14 Arithmetic Flags 31 3 5 AR Auxiliary Relay Area 32 3 5 1 Optical Transmitting I O Unit Error Flags 33 3 5 2 SYSMAC LINK System Data Link Set...

Page 29: ...TR 00 to TR 07 bits only Used to temporarily store and retrieve execu tion conditions These bits can only be used in the Load and Output instructions Storing and retrieving execution conditions is necessary when programming certain types of branching ladder diagrams Program Memory UM UM Depends on Memory Unit used Contains the program executed by the CPU When some bits and words in certain data ar...

Page 30: ...o form a new word Bit number IR word 000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR word 001 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 The DM area is accessible by word only you cannot designate an individual bit within a DM word Data in the IR SR HR AR and LR areas is accessible either by word or by bit depending on the instruction in which the data is be ing used To...

Page 31: ...ent of the corresponding decimal digit The BCD bits 0101011101010111 are converted to decimal by considering each four bits from the right Binary 0101 is deci mal 5 binary 0111 is decimal 7 The decimal equivalent would thus be 5 757 Note that this is not the same numeric value as the hexadecimal equivalent of 0101011101010111 which would be 5 757 hexadecimal or 22 359 in deci mal 163 x 5 162 x 7 1...

Page 32: ...EP 11 DIFU 13 DIFD 14 and SFT 10 If an output bit is used in more than one such instruction only the status determined by the last instruction will actually be output from the PC See 5 13 1 Shift Register SFT 10 for an example that uses an output bit in two bit control instructions I O words are allocated to the CPU Rack and Expansion I O Racks by slot position One I O word is allocated to each sl...

Page 33: ...Host Link Units do not use I O words and the PC Link Units use the LR area so words allocated to the slots in which these units are mounted are available as work words An I O Unit may require anywhere from 8 to 16 bits depending on the model With most I O Units any bits not used for input or output are available as work bits Transistor Output Units C200H OD213 and C200H OD411 as well as Triac Outp...

Page 34: ...250 00 to 07 PC Link Unit Run Flags or data link status for operating level 1 08 to 15 PC Link Unit Error Flags or data link status for operating level 1 251 00 to 15 Remote I O Error Flags 252 00 SEND 90 RECV 98 Error Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System 01 SEND 90 RECV 98 Enable Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System 02 Operating Level ...

Page 35: ...5312 turns ON to indicate an error has occurred in Remote I O Sys tems The ALARM ERROR indicator will flash but PC operation will continue SR 251 as well as AR 0014 and AR 0015 contain information on the source and type of error The function of each bit is described below Refer to Optical and Wired Remote I O System Manuals for details If there are errors in more than one Remote I O Unit word 251 ...

Page 36: ... restart a Host Link Unit SR bits used with Host Link Sys tems are summarized in the following table Rack mounting Host Link Unit Restart bits are not effective for the Multilevel Rack mounting Host Link Units Refer to the Host Link System Manual for details Bit Flag 25206 Rack mounting Host Link Unit Level 1 Error Flag 25207 Rack mounting Host Link Unit Level 1 Restart Bit 25208 CPU mounting Host...

Page 37: ...or when communications are not completed successfully These error codes are as follows SYSMAC LINK Systems Completion code Name Meaning 00 Normal end Data transfer was completed successfully 01 Parameter error SEND 90 RECV 98 instruction operands are not within specified ranges 02 Transmission impossible The System was reset during execution of the instruction or the destination node is not in the...

Page 38: ...ems Level 0 Level 1 Bits 00 to 03 04 to 07 08 to 11 12 to 15 SR 238 SR 242 Node 1 Node 2 Node 3 Node 4 SR 239 SR 243 Node 5 Node 6 Node 7 Node 8 SR 240 SR 244 Node 9 Node 10 Node 11 Node 12 SR 241 SR 245 Node 13 Node 14 Node 15 Node 16 Each of the above sets of four bits operates as shown below Leftmost bit Middle bits Rightmost bit ON when data link is active ON when there is a data communication...

Page 39: ...ws bit assignments for Single level and Multi level PC Link Systems Single level PC Link Systems Flag type Bit no SR 247 SR 248 SR 249 SR 250 Run flags 00 Unit 24 Unit 16 Unit 8 Unit 0 01 Unit 25 Unit 17 Unit 9 Unit 1 02 Unit 26 Unit 18 Unit 10 Unit 2 03 Unit 27 Unit 19 Unit 11 Unit 3 04 Unit 28 Unit 20 Unit 12 Unit 4 05 Unit 29 Unit 21 Unit 13 Unit 5 06 Unit 30 Unit 22 Unit 14 Unit 6 07 Unit 31 U...

Page 40: ... Unit 5 level 0 14 Unit 14 level 1 Unit 6 level 1 Unit 14 level 0 Unit 6 level 0 15 Unit 15 level 1 Unit 7 level 1 Unit 15 level 0 Unit 7 level 0 If the PC is in a Multilevel PC Link System and the content of word 248 is 02FF then PC Link Units 0 through 7 of in the PC Link Subsystem as signed operating level 1 would be in RUN mode and PC Link Unit 1 in the same Subsystem would have an error The h...

Page 41: ...ROGRAM mode to MONITOR or RUN modes If SR 25212 is ON bit status will be maintained if SR 25212 is OFF all IR and LR area bits will be reset With the CPU11 E CPU Unit the I O Status Hold Bit will only be effective if enabled with the Set System instruction SYS 49 The status of SR 25211 in not affected by a power interruption unless the I O table is registered in that case SR 25211 will go OFF SR 2...

Page 42: ...d in the usual way The status of the Output OFF Bit is maintained for power interruptions or when PC operation is stopped unless the I O table has been registered CPU Units CPU01 E and CPU03 E or the I O table has been registered and either the Force Status Hold Bit or the I O Status Hold Bit has not been enabled with SYS 49 CPU Unit CPU11 E In the following cases DM DM 0000 to DM 0999 HR AR CNT a...

Page 43: ...cle time exceeds 100 ms The ALARM ER ROR indicator on the front of the CPU will also flash Program execution will not stop however unless the maximum time limit set for the watchdog timer is exceeded Timing may become inaccurate after the cycle time exceeds 100 ms 3 4 9 I O Verification Error Flag SR bit 25310 turns ON when the Units mounted in the system disagree with the I O table registered in ...

Page 44: ...tructions They are generally referred to only by their two letter abbreviations These flags are all reset when the END 01 instruction is executed and therefore cannot be monitored from a programming device Refer to 5 13 Data Shifting 5 15 Data Comparison 5 17 BCD Calculations and 5 18 Binary Calculations for details SR bit 25504 turns ON when there is a carry in the result of an arithmetic op erat...

Page 45: ...stem 11 Error Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System 12 Host Computer to Rack mounting Host Link Unit Level 1 Error Flag 13 Host Computer to Rack mounting Host Link Unit Level 0 Error Flag 14 Remote I O Master Unit 1 Error Flag 15 Remote I O Master Unit 0 Error Flag 01 00 to 09 Restart Bits for Special I O Units 0 to 9 also function as Restart Bits for PC Link Units 10...

Page 46: ...ted Flag 14 Rack mounting Host Link Unit Level 0 Mounted Flag 15 CPU mounting Device Mounted Flag 25 00 to 15 FALS generating Address 26 00 to 15 Maximum Cycle Time 27 00 to 15 Present Cycle Time 3 5 1 Optical Transmitting I O Unit Error Flags AR 03 through AR 06 contain the Error Flags for Optical Transmitting I O Units An error indicates a duplication of a unit number Up to 64 Optical Transmitti...

Page 47: ...n 3 5 3 Error History Bits CPU11 E Only AR 0713 Error History Overwrite Bit is turned ON or OFF by the user to control overwriting of records in the Error History Area in the DM area Turn AR 0713 ON to overwrite the oldest error record each time an error occurs after 10 have been recorded Turn OFF AR 0713 to store only the first 10 records that occur each time after the history area is cleared AR ...

Page 48: ...Clock Area and Bits CPU11 E Only Calendar Clock Area If AR 2114 Stop Bit is OFF then the date day and time will be available in BCD in AR 18 to AR 20 and AR 2100 to AR 2108 as shown below This area can also be controlled with AR 2113 Seconds Round off Bit and AR 2115 Set Bit Bits Contents Possible values AR 1800 to AR 1807 Seconds 00 to 59 AR 1808 to AR 1815 Minutes 00 to 59 AR 1900 to AR 1907 Hou...

Page 49: ...mode any inputs on keys 0 through 9 including characters A through F i e keys 0 through 5 with SHIFT will turn on a corresponding bit in AR 22 TER MINAL mode is entered either through Programming Console operations or by executing KEY 62 The bits in AR 22 correspond to Programming Console inputs as follows Bit Programming Console input AR 2200 0 AR 2201 1 AR 2202 2 AR 2203 3 AR 2204 4 AR 2205 5 AR...

Page 50: ...ed Flag AR 2408 SYSMAC LINK SYSMAC NET Link Unit in operating level 1 SYSMAC LINK SYSMAC NET Link Unit Level 0 Mounted Flag AR 2409 SYSMAC LINK SYSMAC NET Link Unit in operating level 0 Rack mounting Host Link Unit Level 1 AR 2413 Rack mounting Host Link Unit in operating level 1 Rack mounting Host Link Unit Level 0 AR 2414 Rack mounting Host Link Unit in operating level 0 3 5 13 CPU mounting Devi...

Page 51: ...e however to use indirect DM addresses as the operands for many instructions To indicate an indirect DM address DM is input with the address of the operand With an indirect address with content of this oper and does not contain the actual data to be used Instead it s contents is as sumed to hold the address of another DM word the content of which will ac tually be used in the instruction If DM 010...

Page 52: ... 15 00 non fatal or 80 fatal Second 00 to 07 Seconds 08 to 15 Minutes Third 00 to 07 Hours 08 to 15 Day of month Operation When the first error code is generated with AR 0715 Error History Enable Bit turned ON the relevant data will be placed in the error record after the one indicated by the History Record Pointer initially this will be record 1 and the Pointer will be incremented Any other error...

Page 53: ...HR bits also have various special applications such as creating latching relays with the Keep instruction and forming self holding outputs These are discussed in Section 4 Writing and Inputting the Program and Section 5 Instruction Set When a SYSMAC LINK System is used a certain number of HR bits is re quired for a routing table and monitor timer These bits are taken from be tween HR 00 to HR 42 R...

Page 54: ...that in programming TIM 000 is used to designate three things the Timer instruction defined with TC number 000 the completion flag for this timer and the PV of this timer The meaning in context should be clear i e the first is always an instruction the second is always a bit and the third is always a word The same is true of all other TC numbers prefixed with TIM or CNT 3 9 LR Link Relay Area The ...

Page 55: ...rom a File Memory Unit if one is mounted to the CPU Rack Refer to the end of Appendix A Standard Models for information on FIT and other special products Programming Console op erations including those for program input are described in Sections 4 and 7 3 11 TR Temporary Relay Area The TR area provides eight bits that are used only with the LD and OUT in structions to enable certain types of branc...

Page 56: ...sole 58 4 4 1 The Keyboard 59 4 4 2 PC Modes 60 4 4 3 The Display Message Switch 62 4 5 Preparation for Operation 62 4 5 1 Entering the Password 62 4 5 2 Buzzer 63 4 5 3 Clearing Memory 63 4 5 4 Registering the I O Table 65 4 5 5 Clearing Error Messages 66 4 5 6 Verifying the I O Table 66 4 5 7 Reading the I O Table 67 4 5 8 Clearing the I O Table 69 4 5 9 NET Link Table Transfer 70 4 6 Inputting ...

Page 57: ...ady for use execute the program and fine tune it if required 10 Make a backup copy of the program The basics of ladder diagram programming and conversion to mnemonic code are described in 4 3 Basic Ladder Diagrams Preparing for and input ting the program via the Programming Console are described in 4 4 The Pro gramming Console through 4 6 Inputting Modifying and Checking the Pro gram The rest of S...

Page 58: ...d normally closed conditions and corre spond to a LOAD NOT AND NOT or OR NOT instruction The number above each condition indicates the operand bit for the instruction It is the status of the bit associated with each condition that determines the execution condition for following instructions The way the operation of each of the in structions corresponds to a condition is described below Before we ...

Page 59: ...necessary for efficient programming and is essential when programs are to be input in mne monic code 4 3 2 Mnemonic Code The ladder diagram cannot be directly input into the PC via a Programming Console a GPC a FIT or LSS is required To input from a Programming Console it is necessary to convert the ladder diagram to mnemonic code The mnemonic code provides exactly the same information as the ladd...

Page 60: ...IFU 13 00502 00012 AND 00005 00013 OUT 00503 The address and instruction columns of the mnemonic code table are filled in for the instruction word only For all other lines the left two columns are left blank If the instruction requires no definer or bit operand the operand col umn is left blank for first line It is a good idea to cross through any blank data column spaces for all instruction words...

Page 61: ...res one line of mnemonic code 00000 00100 LR 0000 Instruction Address Instruction Operands 00000 LD 00000 00001 AND NOT 00100 00002 AND LR 0000 00003 Instruction The instruction will have an ON execution condition only when all three con ditions are ON i e when IR 00000 is ON IR 00100 is OFF and LR 0000 is ON AND instructions in series can be considered individually with each taking the logical AN...

Page 62: ...ly with each instruction performing a logic operation on the execution condition and the status of the operand bit The following is one example Study this example until you are convinced that the mnemonic code follows the same logic flow as the ladder diagram Instruction 00002 00003 00000 00001 00200 Address Instruction Operands 00000 LD 00000 00001 AND 00001 00002 OR 00200 00003 AND 00002 00004 A...

Page 63: ... In the above examples IR 00200 will be ON as long as IR 00000 is ON and IR 00201 will be OFF as long as IR 00001 is ON Here IR 00000 and IR 00001 will be input bits and IR 00200 and IR 00201 output bits assigned to the Units controlled by the PC i e the signals coming in through the input points assigned IR 00000 and IR 00001 are controlling the output points as signed IR 00200 and IR 00201 respe...

Page 64: ...ruction logically ANDs the execution conditions produced by two logic blocks The OR LOAD instruction logically ORs the execution condi tions produced by two logic blocks Although simple in appearance the diagram below requires an AND LOAD instruction Instruction 00002 00003 00000 00001 Address Instruction Operands 00000 LD 00000 00001 OR 00001 00002 LD 00002 00003 OR NOT 00003 00004 AND LD The two...

Page 65: ...e to be taken AND LOAD does this The mne monic code for the ladder diagram is shown below The AND LOAD instruc tion requires no operands of its own because it operates on previously deter mined execution conditions Here too dashes are used to indicate that no operands needs designated or input The following diagram requires an OR LOAD instruction between the top log ic block and the bottom logic b...

Page 66: ...0001 00003 00005 00500 Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 OR NOT 00001 00002 LD NOT 00002 00003 OR 00003 00004 AND LD 00005 LD 00004 00006 OR 00005 00007 AND LD 00008 OUT 00500 00000 LD 00000 00001 OR NOT 00001 00002 LD NOT 00002 00003 OR 00003 00004 LD 00004 00005 OR 00005 00006 AND LD 00007 AND LD 00008 OUT 00500 Again with the method on the right a ma...

Page 67: ...c blocks as shown It is not nec essary to further separate block b components because it can be coded di rectly using only AND and OR 00000 00001 00002 00003 00201 00501 00004 Block a Block b Address Instruction Operands 00000 LD 00000 00001 AND NOT 00001 00002 LD 00002 00003 AND 00003 00004 OR 00201 00005 OR 00004 00006 AND LD 00007 OUT 00501 Although the following diagram is similar to the one a...

Page 68: ...cution conditions resulted from a single condition from logic blocks or from previous logic block instructions When working with complicated diagrams blocks will ultimately be coded starting at the top left and moving down before moving across This will gen erally mean that when there might be a choice OR LOAD will be coded be fore AND LOAD The following diagram must be broken down into two blocks...

Page 69: ...nstruction Operands 00000 LD 00000 00001 LD 00001 00002 LD 00002 00003 AND NOT 00003 00004 OR LD 00005 AND LD 00006 LD NOT 00004 00007 AND 00005 00008 OR LD 00009 LD NOT 00006 00010 AND 00007 00011 OR LD 00012 OUT LR 0000 Although the program will execute as written this diagram could be drawn as shown below to eliminate the need for the first OR LOAD and the AND LOAD simplifying the program and s...

Page 70: ...D 00012 OUT LR 0000 Again this diagram can be redrawn as follows to simplify program structure and coding and to save memory space 00006 00007 LR 0000 00005 00001 00002 00003 00004 00000 Address Instruction Operands 00000 LD 00006 00001 AND 00007 00002 OR 00005 00003 AND 00003 00004 AND 00004 00005 LD 00001 00006 AND 00002 00007 OR LD 00008 AND 00000 00009 OUT LR 0000 The next and final example ma...

Page 71: ...g Multiple Right hand Instructions If there is more than one right hand instruction executed with the same exe cution condition they are coded consecutively following the last condition on the instruction line In the following example the last instruction line contains one more condition that corresponds to an AND with IR 00004 00000 00003 00001 00004 00002 HR 0000 HR 0001 00500 00506 Address Inst...

Page 72: ... and cancels current Programming Console operations It is also used when you key in the password at the beginning of programming operations Any Programming Console operation can be can celled by pressing the CLR key although the CLR key may have to be pressed two or three times to cancel the operation and clear the display The yellow keys are used for writing and correcting programs Detailed ex pl...

Page 73: ...nput bit Pressed to enter OUT the Output instruction or used with NOT to enter OUT NOT Also pressed to indicate an output bit Pressed to enter TIM the Timer instruction or to designate a TC number that has already been defined as a timer Pressed before designating an address in the TR area Pressed before designating an address in the LR area Pressed before designating an address in the HR area Pre...

Page 74: ...he extension cable can enter the PC affecting the program and thus the controlled system When the PC is turned on the mode it will be in is affected by any peripheral device connected or mounted to the CPU as follows 1 2 3 1 No Peripheral Device Connected When power is applied to the PC without a Peripheral Device con nected the PC is automatically set to RUN mode Program execution is then control...

Page 75: ...perations are also neces sary at other times e g when changes are to be made in Units used in the PC configuration The following sequence of operations must be performed before beginning initial program input 1 2 3 1 Confirm that all wiring for the PC has been installed and checked prop erly 2 Confirm that a RAM Unit is mounted as the Memory Unit and that the write protect switch is OFF 3 Connect ...

Page 76: ...lso sound whenever an error occurs during PC opera tion Buzzer operation for errors is not affected by the above setting 4 5 3 Clearing Memory Using the Memory Clear operation it is possible to clear all or part of the Pro gram Memory and the IR HR AR DM and TC areas Unless otherwise specified the clear operation will clear all of the above memory areas pro vided that the Memory Unit attached to t...

Page 77: ...iate key after entering REC RESET HR is pressed to designate both the HR and AR areas In other words specifying that HR is to be re tained will ensure that AR is retained also If not specified for retention both areas will be cleared CNT is used for the entire TC area The display will show those areas that will be cleared It is also possible to retain a portion of the Program Memory from the begin...

Page 78: ...e must also be registered when ever I O Units are changed Unlike the C500H and C1000H PCs C200H memory is allocated to slots in the CPU and Extension I O Racks so it is not necessary to register the I O table Register the I O table if you want an error to occur when I O Units have been added removed or replaced with another type I O Table Registration can be performed only in PROGRAM mode The I O ...

Page 79: ...e refer to Section 8 Troubleshooting To display any recorded error messages press CLR FUN and then MONTR The first message will appear Pressing MONTR again will clear the present message and display the next error message Continue pressing MONTR until all messages have been cleared Although error messages can be accessed in any mode they can be cleared only in PROGRAM mode Key Sequence 4 5 6 Verif...

Page 80: ...lication Indicates a Remote I O Unit that has not been registered 00000I OTBL VER R ĆI R ĆW 00000I OTBL VER Ć U RMT 4 5 7 Reading the I O Table The I O Table Read operation is used to access the I O table that is currently registered in the CPU memory Key Sequence 0 to 2 0 to 9 Rack number Unit number Press the EXT key to select Remote I O Slave Racks or Optical I O Units Preparation for Operation...

Page 81: ...ack Units Optical I O Unit PC Unit Meaning of Displays I O Unit Designations for Displays see I O Units Mounted in Remote Slave Racks next page No of points 16 32 64 Input Unit Output Unit C500 1000H C2000H I O Units No of points 8 16 Input Unit Output Unit 0 0 0 0 0 0 0 I I I I I I I i i i o o o C200H I O Units Note is i for non fatal errors or F_ Example Preparation for Operation Section 4 5 ...

Page 82: ...I O Slave Unit number 0 to 4 Remote I O Master Unit number 0 to 1 Indicates a Remote I O Rack 00000I OTBL READ R Ć U I O word number 200 to 231 I O type I input O output or W input output Remote I O Master Unit number 0 to 1 Word H leftmost 8 bits L rightmost 8 bits 00000I OTBL READ 2 HU R Ć 4 5 8 Clearing the I O Table The I O Table Clear operation is used to delete the contents of the I O table ...

Page 83: ... table to be written into EPROM together This operation is applicable to the CPU11 E only Note When power is applied to a PC which has a copy of a NET Link table stored in its program memory the NET Link table of the CPU will be overwritten Changes made in the NET Link table do not affect the copy of the NET Link table in program memory NET Link Table Transfer must be repeated to change the copy i...

Page 84: ...K TBL UM SYSMACĆNET 00000LINK TBL UM OK 00000LINK TBL UM SYSMACĆNET 9713 00000LINK TBL UM DISABLED The following indicates that the I O table cannot be transferred 00000 00000 FUN Example Preparation for Operation Section 4 5 ...

Page 85: ...it as required Further debugging methods are pro vided in Section 7 Program Monitoring and Execution 4 6 1 Setting and Reading from Program Memory Address When inputting a program for the first time it is generally written to Program Memory starting from address 00000 Because this address appears when the display is cleared it is not necessary to specify it When inputting a program starting from o...

Page 86: ...he mnemonic code When WRITE is pressed at the end of each line the designated in struction or operand is entered and the next display will appear If the instruc tion requires two or more words the next display will indicate the next oper and required and provide a default value for it If the instruction requires only one word the next address will be displayed Continue inputting each line of the m...

Page 87: ... block instructions Function codes for block instructions are always written between pointed parentheses like this Both types of function codes are used in basically the same way but SHIFT must be pressed be fore inputting a block instruction function code To designate the differentiated form of an instruction press NOT after the function code To input an instruction using a function code set the ...

Page 88: ...AD NOP 00 00202 FUN 00202 TIMH 15 001 00202 TIMH DATA 0000 00202 TIMH 0500 00203READ NOP 00 Address Instruction Operands 00200 LD 00002 00201 TIM 000 0123 00202 TIMH 15 001 0500 The following error messages may appear when inputting a program Correct the error as indicated and continue with the input operation The asterisks in Example Error Messages Inputting Modifying and Checking the Program Sec...

Page 89: ...t might create a syntax error To check the program input the key sequence shown below The numbers indicate the desired check level see below When the check level is en tered the program check will start If an error is discovered the check will stop and a display indicating the error will appear Press SRCH to continue the check If an error is not found the program will be checked through to the fir...

Page 90: ...ed correctly Check STEP 08 programming requirements and correct the program Type B IL ILC ERR IL 02 and ILC 03 are not used in pairs Correct the program so that each IL 02 has a unique ILC 03 Although this error message will appear if more than one IL 02 is used with the same ILC 03 the program will executed as written Make sure your program is written as desired before proceeding JMP JME ERR JMP ...

Page 91: ... 00064PROG CHK 4 6 4 Displaying the Cycle Time Once the program has been cleared of syntax errors the cycle time should be checked This is possible only in RUN or MONITOR mode while the pro gram is being executed See Section 6 Program Execution Timing for details on the cycle time To display the current average cycle time press CLR then MONTR The time displayed by this operation is a typical cycle...

Page 92: ...n input the instruction just as when inputting the pro gram and press SRCH Once an occurrence of an instruction or bit address has been found any additional occurrences of the same instruction or bit can be found by pressing SRCH again SRCH G will be displayed while a search is in progress When the first word of a multiword instruction is displayed for a search opera tion the other words of the in...

Page 93: ...RAM mode any instruction that is currently displayed can be de leted or another instruction can be inserted before it These are not possible in RUN or MONITOR modes To insert an instruction display the instruction before which you want the new instruction to be placed input the instruction word in the same way as when inputting a program initially and then press INS and the down key If other Examp...

Page 94: ...n are adjusted automatically so that there are no blank addresses or no unaddressed instructions The following mnemonic code shows the changes that are achieved in a pro gram through the key sequences and displays shown below Original Program Address Instruction Operands 00000 LD 00100 00001 AND 00101 00002 LD 00201 00003 AND NOT 00102 00004 OR LD 00005 AND 00103 00006 AND NOT 00104 00007 OUT 0020...

Page 95: ...D 00005 AND 00103 00006 AND 00105 00007 AND NOT 00104 00008 OUT 00201 00009 END 01 Find the instruction that requires deletion Confirm that this is the instruction to be deleted Program After Deletion Deleting an Instruction 00000 00000 OUT 00000 00000 OUT 00201 00208SRCH OUT 00201 00207READ AND NOT 00104 00207 DELETE AND NOT 00104 00207DELETE END OUT 00201 00206READ AND 00105 Address Instruction ...

Page 96: ...t the branch ing point cannot be changed before returning to the branch line instructions at the far right do not change the execution condition then the branch line will be executed correctly and no special programming measure is required If as shown in diagram B a condition exists between the branching point and the last instruction on the top instruction line the execution condition at the bran...

Page 97: ...001 00004 Instruction 2 Instruction 3 Instruction 4 Address Instruction Operands 00000 LD 00000 00001 OUT TR 0 00002 AND 00001 00003 OUT TR 1 00004 AND 00002 00005 OUT 00500 00006 LD TR 1 00007 AND 00003 00008 OUT 00501 00009 LD TR 0 00010 AND 00004 00011 OUT 00502 00012 LD TR 0 00013 AND NOT 00005 00014 OUT 00503 In this example TR 0 and TR 1 are used to store the execution conditions at the bran...

Page 98: ... place the proper data in the required operand word Be sure that you have considered execution order before reorganizing a program to simplify it Instruction 1 00000 Instruction 2 00001 TR 0 Instruction 2 00000 Instruction 1 00001 Instruction 1 00000 Instruction 2 00003 TR 0 00001 00004 00002 00001 00003 00000 00004 00002 00001 Instruction 1 Instruction 2 Note TR bits are only used when programmin...

Page 99: ...d on an instruction line for the INTER LOCK instruction all of lines leading from the branching point are written as separate instruction lines and another instruction line is added for the IN TERLOCK CLEAR instruction No conditions are allowed on the instruction line for INTERLOCK CLEAR Note that neither INTERLOCK nor INTER LOCK CLEAR requires an operand Instruction 1 00002 00000 Instruction 2 00...

Page 100: ...ps A specific section of a program can be skipped according to a designated execution condition Although this is similar to what happens when the exe cution condition for an INTERLOCK instruction is OFF with jumps the oper ands for all instructions maintain status Jumps can therefore be used to con trol devices that require a sustained output e g pneumatics and hydraulics whereas interlocks can be...

Page 101: ...n 00 is used as the jump number for a JUMP instruction program execution moves to the instruction following the next JUMP END instruction with a jump num ber of 00 Although as in all jumps no status is changed and no instructions are executed between the JUMP 00 and JUMP END 00 instructions the pro gram must search for the next JUMP END 00 instruction producing a slightly longer execution time Exe...

Page 102: ...quire only one line of mnemonic code 00000 00001 DIFU 13 00200 DIFD 14 00201 Address Instruction Operands 00000 LD 00000 00001 DIFU 13 00200 Address Instruction Operands 00000 LD 00001 00001 DIFD 14 00201 Here IR 00200 will be turned ON for one cycle after IR 00000 goes ON The next time DIFU 13 00200 is executed IR 00200 will be turned OFF regard less of the status of IR 00000 With the DIFFERENTIA...

Page 103: ...terlocked program section when the execution condition for the INTERLOCK instruction was ON Here just as in the same diagram using the KEEP in struction two reset bits are used i e HR 0000 can be turned OFF by turning ON either IR 00004 or IR 00005 00002 00003 HR 0000 HR 0000 00004 00005 Address Instruction Operands 00000 LD 00002 00001 AND NOT 00003 00002 OR HR 0000 00003 AND NOT 00004 00004 OR N...

Page 104: ...rk bits Under standing the use of these bits is essential to effective programming Work bits can be used to simplify programming when a certain combination of conditions is repeatedly used in combination with other conditions In the following example IR 00000 IR 00001 IR 00002 and IR 00003 are com bined in a logic block that stores the resulting execution condition as the sta tus of IR 24600 IR 24...

Page 105: ... 00005 AND NOT 00003 00006 OR LD 00007 LD 00004 00008 AND NOT 00005 00009 OR LD 00010 OUT 00100 4 9 Programming Precautions The number of conditions that can be used in series or parallel is unlimited as long as the memory capacity of the PC is not exceeded Therefore use as many conditions as required to draw a clear diagram Although very compli cated diagrams can be drawn with instruction lines t...

Page 106: ...g the INTERLOCK CLEAR JUMP END and step instructions Each of these instructions is used as the second of a pair of instructions and is controlled by the execution condition of the first of the pair Conditions should not be placed on the instruction lines leading to these instructions Refer to Section 5 Instruction Set for details When drawing ladder diagrams it is important to keep in mind the num...

Page 107: ...the desired data is moved to a word before that word is used as the operand for an instruction Remember that an in struction line is completed to the terminal instruction at the right before exe cuting an instruction lines branching from the first instruction line to other ter minal instructions at the right Program execution is only one of the tasks carried out by the CPU as part of the cycle tim...

Page 108: ...Values and Flags 97 5 4 Differentiated Instructions 99 5 5 Coding Right hand Instructions 100 5 6 Ladder Diagram Instructions 102 5 6 1 LOAD LOAD NOT AND AND NOT OR and OR NOT 102 5 6 2 AND LOAD and OR LOAD 103 5 7 Bit Control Instructions 104 5 7 1 OUTPUT and OUTPUT NOT OUT and OUT NOT 104 5 7 2 DIFFERENTIATE UP and DOWN DIFU 13 and DIFD 14 105 5 7 3 KEEP KEEP 11 106 5 8 INTERLOCK and INTERLOCK C...

Page 109: ... ADB 50 179 5 18 2 BINARY SUBTRACT SBB 51 181 5 18 3 BINARY MULTIPLY MLB 52 183 5 18 4 BINARY DIVIDE DVB 53 184 5 19 Logic Instructions 184 5 19 1 COMPLEMENT COM 29 184 5 19 2 LOGICAL AND ANDW 34 185 5 19 3 LOGICAL OR ORW 35 185 5 19 4 EXCLUSIVE OR XORW 36 186 5 19 5 EXCLUSIVE NOR XNRW 37 187 5 20 Subroutines and Interrupt Control 187 5 20 1 Overview 187 5 20 2 SUBROUTINE DEFINE and RETURN SBN 92 ...

Page 110: ...on and contains any definers described below or operand bits required by the instruction Other operands required by the instruction are contained in following words one operand per word Some instructions require up to four words A definer is an operand associated with an instruction and contained in the same word as the instruction itself These operands define the instruction rather than telling w...

Page 111: ...n indirect address can be used Indirect DM addressing is specified by placing an asterisk before the DM DM When an indirect DM address is specified the designated DM word will con tain the address of the DM word that contains the data that will be used as the operand of the instruction If for example DM 0001 was designated as the first operand and LR 00 as the second operand of MOV 21 the contents...

Page 112: ...00 goes ON Even if 00000 remains ON for 2 0 seconds with the same 80 ms cycle time the move operation will be exe cuted only once during the first cycle in which 00000 has changed from OFF to ON Because the content of HR 10 could very well change during the 2 seconds while 00000 is ON the final content of DM 0000 after the 2 seconds could be different depending on whether MOV 21 or MOV 21 was used...

Page 113: ...iner or bit operand the data column is left blank for first line It is a good idea to cross through any blank data col umn spaces for all instruction words that do not require data so that the data column can be quickly cycled to see if any addresses have been left out If an IR or SR address is used in the data column the left side of the column is left blank If any other data area is used the dat...

Page 114: ...0005 00013 TIM 000 0150 00014 LD TIM 000 00015 MOV 21 HR 00 LR 00 00016 LD HR 0015 00017 OUT NOT 00500 00100 00200 DIFU 13 22500 00500 BCNT 67 0001 004 HR 00 MOV 21 HR 00 LR 00 01001 01002 LR 6300 TIM 000 22500 00002 00005 HR 0015 00000 00001 TIM 000 0150 If a right hand instruction requires multiple instruction lines such as KEEP 11 all of the lines for the instruction are entered before the righ...

Page 115: ...have finished coding the program make sure you have placed END 01 at the last address 5 6 Ladder Diagram Instructions Ladder Diagram instructions include Ladder instructions and Logic Block in structions Ladder instructions correspond to the conditions on the ladder diagram Logic block instructions are used to relate more complex parts of the diagram that cannot be programmed with Ladder instructi...

Page 116: ...f its bit operand AND NOT the logical AND be tween the execution condition and the inverse of the status of its bit operand OR takes the logical OR between the execution condition and the status of its bit operand OR NOT the logical OR between the execution condition and the inverse of the status of its bit operand The ladder symbol for loading TR bits is different from that shown above Refer to 4...

Page 117: ... IR SR AR HR TC LR Ladder Symbol Operand Data Areas OUTPUT NOT OUT NOT B Any output bit can generally be used in only one instruction that controls its status Refer to 3 3 IR Area for details OUT and OUT NOT are used to control the status of the designated bit ac cording to the execution condition OUT turns ON the designated bit for an ON execution condition and turns OFF the designated bit for an...

Page 118: ...cution condition is either ON or OFF DIFD 14 will either turn the designated bit OFF or leave it OFF The designated bit will thus never be ON for longer than one cycle assuming it is executed each cycle see Precautions below These instructions are used when differentiated instructions i e those pre fixed with an are not available and single cycle execution of a particular instruction is desired Th...

Page 119: ...ion for MOV 21 requires differentiated treatment 22500 MOV 21 HR 10 DM 0000 DIFU 13 22500 00000 00001 00002 00003 00004 00005 Address Instruction Operands 00000 LD 00000 00001 DIFU 13 22500 00002 LD 22500 00003 LD 00001 00004 AND NOT 00002 00005 AND NOT 00003 00006 OR LD 00007 LD 00004 00008 AND NOT 00005 00009 OR LD 00010 MOV 21 HR 10 DM 0000 5 7 3 KEEP KEEP 11 B Bit IR AR HR LR Ladder Symbol Ope...

Page 120: ...in an interlocked program section 00002 00003 00500 00002 00003 00500 S R KEEP 11 B Address Instruction Operands Address Instruction Operands 00000 LD 00002 00001 OR 00500 00002 AND NOT 00003 00003 OUT 00500 00000 LD 00002 00001 LD 00003 00002 KEEP 11 00500 Flags There are no flags affected by this instruction Exercise caution when using a KEEP reset line that is controlled by an exter nal normall...

Page 121: ...rning bits ON and OFF Refer to 5 12 1 TIMER TIM for details 5 8 INTERLOCK and INTERLOCK CLEAR IL 02 and ILC 03 Ladder Symbol IL 02 Ladder Symbol ILC 03 IL 02 is always used in conjunction with ILC 03 to create interlocks Inter locks are used to enable branching in the same way as can be achieved with TR bits but treatment of instructions between IL 02 and ILC 03 differs from that with TR bits when...

Page 122: ...his are shown below The interlock is in effect while 00000 is OFF Notice that 01000 is not turned ON at the point labeled A even though 00001 has turned OFF and then back ON 00000 IL 02 DIFU 13 01000 ILC 03 00001 00000 00001 ON OFF ON OFF 01000 ON OFF A Address Instruction Operands 00000 LD 00000 00001 IL 02 00002 LD 00001 00003 DIFU 13 01000 00004 ILC 03 There must be an ILC 03 following any one ...

Page 123: ...ecute as written 5 9 JUMP and JUMP END JMP 04 and JME 05 N Jump number 00 to 99 Ladder Symbols Definer Values JMP 04 N N Jump number 00 to 99 JME 05 N Jump numbers 01 through 99 may be used only once in JMP 04 and once in JME 05 i e each can be used to define one jump only Jump number 00 can be used as many times as desired JMP 04 is always used in conjunction with JME 05 to create jumps i e to sk...

Page 124: ...U 13 or DIFD 14 has turned ON a bit it will remain ON until the next time DIFU 13 or DIFD 14 is executed again In normal programming this means the next cycle In a jump this means the next time the jump from JMP 04 to JME 05 is not made i e if a bit is turned ON by DIFU 13 or DIFD 14 and then a jump is made in the next cycle so that DIFU 13 or DIFD 14 are skipped the designated bit will re main ON...

Page 125: ...s also used regardless of the counter instruction that was used to define the counter TC numbers can be designated as operands that require either bit or word data When designated as an operand that requires bit data the TC number accesses a bit that functions as a Completion Flag that indicates when the time count has expired i e the bit which is normally OFF will turn ON when the designated SV h...

Page 126: ...to 5 12 2 HIGH SPEED TIMER TIMH 15 for details A timer is activated when its execution condition goes ON and is reset to SV when the execution condition goes OFF Once activated TIM measures in units of 0 1 second from the SV If the execution condition remains ON long enough for TIM to time down to zero the Completion Flag for the TC number used will turn ON and will re main ON until TIM is reset i...

Page 127: ... Address Instruction Operands 00000 LD 00000 00001 TIM 000 0150 00002 LD TIM 000 00003 OUT 00200 00004 LD 00001 00005 TIM 001 005 00006 AND NOT TIM 001 00007 OUT 00200 There are two ways to achieve timers that operate for longer than 999 9 sec onds One method is to program consecutive timers with the Completion Flag of each timer used to activate the next timer A simple example with two 900 0 seco...

Page 128: ...00500 00000 TIM 001 TIM 002 005 0 s 003 0 s 00000 00500 5 0 s 3 0 s TIM 001 0050 S R KEEP 11 00500 TIM 002 0030 Address Instruction Operands 00000 LD 00000 00001 TIM 001 0050 00002 LD 00500 00003 AND NOT 00000 00004 TIM 002 0030 00005 LD TIM 001 00006 LD TIM 002 00007 KEEP 11 00500 The length of time that a bit is kept ON or OFF can be controlled by combin ing TIM with OUT or OUT NO The following ...

Page 129: ...regular intervals while a des ignated execution condition is ON by using TIM twice One TIM functions to turn ON and OFF a specified bit i e the Completion Flag of this TIM turns the specified bit ON and OFF The other TIM functions to control the opera tion of the first TIM i e when the first TIM s Completion Flag goes ON the second TIM is started and when the second TIM s Completion Flag goes ON t...

Page 130: ...Although 00 00 and 00 01 may be set 00 00 will disable the timer i e turn ON the Completion Flag immediately and 00 01 is not reliably cycled The decimal point is not entered Each TC number can be used as the definer in only one TIMER or COUNT ER instruction TC 000 through TC 047 must be used to ensure accuracy if the cycle time is greater than 10 ms TIMH 15 operates in the same way as TIM except ...

Page 131: ...V Each TC number can be used as the definer in only one TIMER or COUNT ER instruction CNT is used to count down from SV when the execution condition on the count pulse CP goes from OFF to ON i e the present value PV will be decremented by one whenever CNT is executed with an ON execution condi tion for CP and the execution condition was OFF for the last execution If the execution condition has not...

Page 132: ... CNT 004 Address Instruction Operands 00000 LD 00000 00001 AND 00001 00002 LD 00002 00003 CNT 0004 0150 00004 LD CNT 004 00005 OUT 00205 Here 00000 can be used to control when CNT is operative and 00001 can be used as the bit whose OFF to ON changes are being counted The above CNT can be modified to restart from SV each time power is turned ON to the PC This is done by using the First Cycle Flag i...

Page 133: ...002 00005 CNT 001 0100 00006 LD CNT 001 00007 LD NOT 00002 00008 CNT 002 0200 00009 LD CNT 002 00010 OUT 00203 CNT can be used in sequence as many times as required to produce count ers capable of counting any desired values CNT can be used to create extended timers in two ways by combining TIM with CNT and by counting SR area clock pulse bits In the following example CNT 002 counts the number of ...

Page 134: ...nstruction Operands 00000 LD 00000 00001 AND 25502 00002 LD NOT 00001 00003 CNT 001 0700 00004 LD CNT 001 00005 OUT 00202 Caution The shorter clock pulses will not necessarily produce accurate timers be cause their short ON times might not be read accurately during longer cycles In particular the 0 02 second and 0 1 second clock pulses should not be used to create timers with CNT instructions 5 12...

Page 135: ...cremented again CNTR 12 is reset with a reset input R When R goes from OFF to ON the PV is reset to zero The PV will not be incremented or decremented while R is ON Counting will begin again when R goes OFF The PV for CNTR 12 will not be reset in interlocked program sections or by the effects of power interruptions Changes in II and DI execution conditions the Completion Flag and the PV are illust...

Page 136: ...on P is ON and was OFF the last execu tion and 2 R is OFF then execution condition I is shifted into the rightmost bit of a shift register defined between St and E i e if I is ON a 1 is shifted into the register if I is OFF a 0 is shifted in When I is shifted into the regis ter all bits previously in the register are shifted to the left and the leftmost bit of the register is lost Execution condit...

Page 137: ...AR 00 AR 01 00005 LD 00004 00006 DIFU 13 12800 00007 LD 12800 00008 JMP 04 00 00009 LD 12800 00010 OUT AR 0100 00011 JME 05 00 When a bit that is part of a shift register is used in OUT or any other instruc tion that controls bit status a syntax error will be generated during the pro gram check but the program will executed properly i e as written The following program controls the conveyor line s...

Page 138: ...00006 LD 00002 00007 OUT NOT 00500 00008 OUT NOT HR 0003 5 13 2 REVERSIBLE SHIFT REGISTER SFTR 84 C Control word IR AR DM HR LR St Starting word IR AR DM HR LR Ladder Symbols Operand Data Areas E End word IR AR DM HR LR SFTR 84 C St E SFTR 84 C St E St and E must be in the same data area and St must be less than or equal to E SFTR 84 is used to create a single or multiple word shift register that ...

Page 139: ...condition and the reset bit bit 15 is OFF the entire shift register and CY will be set to zero Flags ER St and E are not in the same data area or ST is greater than E Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded CY Receives the status of bit 00 of St or bit 15 of E depending on the shift direction In the following example IR 0...

Page 140: ...eives the status of bit 15 EQ ON when the content of Wd is zero otherwise OFF 5 13 4 ARITHMETIC SHIFT RIGHT ASR 26 Wd Shift word IR AR DM HR LR Ladder Symbols Operand Data Areas ASR 26 Wd ASR 26 Wd When the execution condition is OFF ASR 25 is not executed When the execution condition is ON ASR 25 shifts a 0 into bit 15 of Wd shifts the bits of Wd one bit to the right and shifts the status of bit ...

Page 141: ...s non existent Content of DM word is not BCD or the DM area boundary has been exceeded CY Receives the data of bit 15 EQ ON when the content of Wd is zero otherwise OFF 5 13 6 ROTATE RIGHT ROR 28 Wd Rotate word IR AR DM HR LR Ladder Symbols Operand Data Areas ROR 28 Wd ROR 28 Wd When the execution condition is OFF ROR 28 is not executed When the execution condition is ON ROR 28 shifts all Wd bits ...

Page 142: ...SLD 74 shifts data between St and E inclusive by one digit four bits to the left 0 is written into the rightmost digit of the St and the content of the leftmost digit of E is lost 5 E 8 1 St F C 9 7 D Lost data 0 If a power failure occurs during a shift operation across more than 50 words the shift operation might not be completed Flags ER The St and E words are in different areas or St is greater...

Page 143: ...y addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded 5 13 9 WORD SHIFT WSFT 16 Ladder Symbols Operand Data Areas WSFT 16 St E WSFT 16 St E St Starting word IR AR DM HR LR E End word IR AR DM HR LR St and E must be in the same data area and E must be greater than or equal to St When the execution condition is OFF WSFT 16 is not executed When th...

Page 144: ...e register trades places with the next word See Exam ple below The shift direction i e whether the next word is the next higher or the next lower word is designated in C C is also used to reset the register All of any portion of the register can be reset by designating the desired portion with St and E Bits 00 through 12 of C are not used Bit 13 is the shift direction turn bit 13 ON to shift down ...

Page 145: ...e communica tions in Link Systems also requires data movement All of these instructions change only the content of the words to which data is being moved i e the content of source words is the same before and after execution of any of the data movement instructions 5 14 1 MOVE MOV 21 S Source word IR SR AR DM HR TC LR D Destination word IR AR DM HR LR Ladder Symbols Operand Data Areas MOV 21 S D M...

Page 146: ...change the PV of the timer or counter However these can be easily changed using BSET 71 Flags ER Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded EQ ON when all zeros are transferred to D 5 14 3 COLUMN TO WORD CTW 63 S First word of 16 word source set IR SR AR DM HR LR C Column bit designator BCD IR AR DM HR TC LR Ladder Symbols O...

Page 147: ...wing example shows how to use CTW 63 to move bit column 07 from the set IR 100 to IR 115 to DM 0100 CTW 63 100 0007 DM 0100 00000 Address Instruction Operands 00000 LD 00000 00001 CTW 63 100 0007 DM 0100 5 14 4 WORD TO COLUMN WTC 64 S Source word IR SR AR DM HR LR C Column bit designator BCD IR AR DM HR TC LR Ladder Symbols Operand Data Areas D First word of the destination set IR AR DM HR LR WTC ...

Page 148: ...llowing example shows how to use WTC 64 to move the contents of word DM 0100 00 to 15 to bit column 15 of the set DM 0200 to DM 0215 WTC 64 DM 0100 DM 0200 0015 00000 Address Instruction Operands 00000 LD 00000 00001 WTC 64 DM 0100 DM 0200 0015 5 14 5 BLOCK SET BSET 71 S Source data IR SR AR DM HR TC LR St Starting word IR AR DM HR TC LR Ladder Symbols Operand Data Areas E End Word IR AR DM HR TC ...

Page 149: ...oundary has been exceeded The following example shows how to use BSET 71 to change the PV of a timer depending on the status of IR 00003 and IR 00004 When IR 00003 is ON TIM 010 will operate as a 50 second timer when IR 00004 is ON TIM 010 will operate as a 30 second timer TIM 010 9999 BSET 71 0500 TIM 010 TIM 010 BSET 71 0300 TIM 010 TIM 010 00004 00003 00003 00004 00004 00003 Address Instruction...

Page 150: ...F XFER 70 is not executed When the execution condition is ON XFER 70 copies the contents of S S 1 S N to D D 1 D N 2 D 3 4 5 1 D 1 3 4 5 2 D 2 3 4 2 2 D N 6 4 5 2 S 3 4 5 1 S 1 3 4 5 2 S 2 3 4 2 2 S N 6 4 5 Flags ER N is not BCD S and S N or D and D N are not in the same data area Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded 5...

Page 151: ...DBs Of Of must be a BCD DBs must be in the same data area as DBs Of When the execution condition is OFF DIST 80 is not executed When the execution condition is ON DIST 80 copies the content of S to DBs Of i e Of is added to DBs to determine the destination word 2 DBs Of 3 4 5 2 S 3 4 5 Flags ER The specified offset data is not BCD or when added to the DBs the resulting address lies outside the dat...

Page 152: ...VB 82 S Bi D MOVB 82 S Bi D Limitations The rightmost two digits and the leftmost two digits of Bi must each be be tween 00 and 15 When the execution condition is OFF MOVB 82 is not executed When the execution condition is ON MOVB 82 copies the specified bit of S to the spe cified bit in D The bits in S and D are specified by Bi The rightmost two dig its of Bi designate the source bit the leftmost...

Page 153: ... shown below Digits from S will be copied to consecutive digits in D starting from the desig nated first digit and continued for the designated number of digits If the last digit is reached in either S or D further digits are used starting back at digit 0 First digit in S 0 to 3 Number of digits 0 to 3 0 1 digit 1 2 digits 2 3 digits 3 4 digits First digit in D 0 to 3 Not used Digit number 3 2 1 0...

Page 154: ... TB2 R Limitations Can be performed with the CPU11 E only When the execution condition is OFF MCMP 19 is not executed When the execution condition is ON MCMP 19 compares the content of TB1 to TB2 TB1 1 to TB2 1 TB1 2 to TB2 2 and TB1 15 to TB2 15 If the first pair is equal the first bit in R is turned OFF etc i e if the content of TB1 equals the content of TB2 bit 00 is turned OFF if the content o...

Page 155: ...0210 DM 030014 0 IR 115 1212 DM 0215 1600 DM 030015 1 MCMP 19 100 DM 0200 DM 0300 00000 TB1 IR 100 TB2 DM 0200 R DM 0300 Address Instruction Operands 00000 LD 00000 00001 MCMP 19 100 DM 0200 DM 0300 5 15 2 COMPARE CMP 20 Cp1 First compare word IR SR AR DM HR TC TR Cp2 Second compare word IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas CMP 20 Cp1 Cp2 When comparing a value to the PV of a tim...

Page 156: ...5507 00202 TR 0 25506 00201 Greater Than Equal Less Than Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 OUT TR 0 00002 CMP 20 010 HR 09 00003 LD TR 0 00004 AND 25505 00005 OUT 00200 00006 LD TR 0 00007 AND 25506 00008 OUT 00201 00009 LD TR 0 00010 AND 25507 00011 OUT 00202 The following example uses TIM CMP 20 and the LE flag 25507 to pro duce outputs at particular ...

Page 157: ...truction Operands Address Instruction Operands 00000 LD 00000 00001 TIM 010 5000 00002 CMP 20 TIM 010 4000 00003 AND 25507 00004 OUT 00200 00005 LD 00200 00006 CMP 20 TIM 010 3000 00007 AND 25507 00008 OUT 00201 00009 LD 00201 00010 CMP 20 TIM 010 2000 00011 AND 25507 00012 OUT 00202 00013 LD TIM 010 00014 OUT 00204 5 15 3 DOUBLE COMPARE CMPL 60 Cp2 First word of second compare word pair IR SR AR ...

Page 158: ... Cp2 EQ ON if Cp1 1 Cp1 equals Cp2 1 Cp2 LE ON if Cp1 1 Cp1 is less than Cp2 1 Cp2 The following example shows how to save the comparison result immedi ately If the content of HR 10 HR 09 is greater than that of 011 010 then 00200 is turned ON if the two contents are equal 00201 is turned ON if content of HR 10 HR 09 is less than that of 011 010 then 00202 is turned ON In some applications only on...

Page 159: ...in any of these ranges inclu sive of the upper and lower limits the corresponding bit in R is set The comparisons that are made and the corresponding bit in R that is set for each true comparison are shown below The rest of the bits in R will be turned OFF CB CD CB 1 Bit 00 CB 2 CD CB 3 Bit 01 CB 4 CD CB 5 Bit 02 CB 6 CD CB 7 Bit 03 CB 8 CD CB 9 Bit 04 CB 10 CD CB 11 Bit 05 CB 12 CD CB 13 Bit 06 C...

Page 160: ...001 which contains 0210 with the given ranges Address Instruction Operands 00000 LD 00000 00001 BCMP 88 001 HR 10 HR 05 5 15 5 TABLE COMPARE TCMP 85 CD Compare data IR SR AR DM HR TC LR TB First comparison table word IR SR DM HR TC LR Ladder Symbols Operand Data Areas R Result word IR AR DM HR TC LR TCMP 85 CD TB R TCMP 85 CD TB R When the execution condition is OFF TCMP 85 is not executed When th...

Page 161: ...13 0400 HR 0503 0 HR 14 0500 HR 0504 0 HR 15 0600 HR 0505 0 HR 16 0210 HR 0506 1 HR 17 0800 HR 0507 0 HR 18 0900 HR 0508 0 HR 19 1000 HR 0509 0 HR 20 0210 HR 0510 1 HR 21 1200 HR 0511 0 HR 22 1300 HR 0512 0 HR 23 1400 HR 0513 0 HR 24 0210 HR 0514 1 HR 25 1600 HR 0515 0 TCMP 85 001 HR 10 HR 05 00000 Compare the data in IR 001 with the given ranges Address Instruction Operands 00000 LD 00000 00001 T...

Page 162: ...execution condition is ON BIN 23 converts the BCD content of S into the numerically equivalent binary bits and outputs the binary value to R Only the content of R is changed the content of S is left unchanged S R BCD Binary BIN 23 can be used to convert BCD to binary so that displays on the Pro gramming Console or any other programming device will appear in hexadeci mal rather than decimal It can ...

Page 163: ...D 24 will not be executed When the instruction is not executed the content of R remains unchanged BCD 24 converts the binary hexadecimal content of S into the numerically equivalent BCD bits and outputs the BCD bits to R Only the content of R is changed the content of S is left unchanged S R BCD Binary BCD 24 can be used to convert binary to BCD so that displays on the Pro gramming Console or any ...

Page 164: ...of R and R 1 exceeds 99999999 Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded EQ ON when the result is zero 5 16 5 HOURS TO SECONDS HTS 65 S Beginning source word BCD IR SR AR DM HR TC LR R Beginning result word BCD IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas Not used HTS 65 S R HTS 65 S R Limitations Can be performed ...

Page 165: ...en in HR 12 and HR 13 to seconds and store the results in DM 0100 and DM 0101 as shown HTS 65 HR 12 DM 0100 000 00000 HR 12 3 2 0 7 HR 13 2 8 1 5 DM 0100 5 9 2 7 DM 0101 1 0 1 3 2 815 hrs 32 min 07 s 10 135 927 s Address Instruction Operands 00000 LD NOT 00000 00001 HTS 65 HR 12 DM 0100 000 5 16 6 SECONDS TO HOURS STH 66 S Beginning source word BCD IR SR AR DM HR TC LR R Beginning result word BCD ...

Page 166: ... 0100 000 00000 HR 12 5 9 2 7 HR 13 1 0 1 3 DM 0100 3 2 0 7 DM 0101 2 8 1 5 10 135 927 s 2 815 hrs 32 min 07 s Address Instruction Operands 00000 LD NOT 00000 00001 STH 66 HR 12 DM 0100 000 5 16 7 4 TO 16 DECODER MLPX 76 S Source word IR SR AR DM HR TC LR Di Digit designator IR AR DM HR TC LR Ladder Symbols Operand Data Areas R First result word IR AR DM HR LR MLPX 76 S Di R MLPX 76 S Di R The rig...

Page 167: ...al word required to store the converted result R plus the number of digits to be converted must be in the same data area as R e g if two digits are converted the last word address in a data area cannot be designated if three digits are converted the last two words in a data area cannot be desig nated The digits of Di are set as shown below Specifies the first digit to be converted 0 to 3 Number of...

Page 168: ...0 HR 1103 0 HR 1203 0 DM 04 1 20 HR 1004 0 HR 1104 0 HR 1204 0 DM 05 1 21 1 HR 1005 0 HR 1105 0 HR 1205 0 DM 06 1 22 HR 1006 0 HR 1106 1 HR 1206 0 DM 07 1 23 HR 1007 0 HR 1107 0 HR 1207 0 DM 08 0 20 HR 1008 0 HR 1108 0 HR 1208 0 DM 09 1 21 2 HR 1009 0 HR 1109 0 HR 1209 0 DM 10 1 22 HR 1010 0 HR 1110 0 HR 1210 0 DM 11 0 23 HR 1011 0 HR 1111 0 HR 1211 0 DM 12 0 20 HR 1012 0 HR 1112 0 HR 1212 0 DM 13...

Page 169: ...rst source word C 0 0 0 1 0 0 0 1 0 0 0 1 0 1 1 0 C transferred to indicate bit number 12 as the highest ON bit Up to four digits from four consecutive source words starting with S may be encoded and the digits written to R in order from the designated first digit If more digits are designated than remain in R counting from the designated first digit the remaining digits will be placed at digits s...

Page 170: ...us number of digits exceeds a data area Content of a source word is zero Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded When 00000 is ON the following diagram encodes IR words 010 and 011 to the first two digits of HR 20 and then encodes LR 10 and 11 to the last two digits of HR 20 Although the status of each source word bit is ...

Page 171: ... IR SR AR DM HR TC LR Di Digit designator IR AR DM HR TC LR Ladder Symbols Operand Data Areas D First destination word IR AR DM HR LR SDEC 78 S Di D SDEC 78 S Di D Di must be within the values given below All destination words must be in the same data area When the execution condition is OFF SDEC 78 is not executed When the execution condition is ON SDEC 78 converts the designated digit s of S int...

Page 172: ...t 1 2 digits 2 3 digits 3 4 digits First half of D to be used 0 Rightmost 8 bits 1st half 1 Leftmost 8 bits 2nd half Not used set to 0 Digit number 3 2 1 0 Some example Di values and the 4 bit binary to 7 segment display conver sions that they produce are shown below 0 1 2 3 S digits Di 0011 D 0 1 2 3 Di 0030 S digits 0 1 2 3 Di 0130 S digits Di 0112 0 1 2 3 S digits 1st half 2nd half D 1st half 2...

Page 173: ... Bits g f e d c b a 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 0 0 0 0 0 1 1 0 2 0 0 1 0 0 1 0 1 1 0 1 1 3 0 0 1 1 0 1 0 0 1 1 1 1 4 0 1 0 0 0 1 1 0 0 1 1 0 5 0 1 0 1 0 1 1 0 1 1 0 1 6 0 1 1 0 0 1 1 1 1 1 0 1 7 0 1 1 1 0 0 1 0 0 1 1 1 8 1 0 0 0 0 1 1 1 1 1 1 1 9 1 0 0 1 0 1 1 0 1 1 1 1 A 1 0 1 0 0 1 1 1 0 1 1 1 B 1 0 1 1 0 1 1 1 1 1 0 0 C 1 1 0 0 0 0 1 1 1 0 0 1 D 1 1 0 1 0 1 0 1 1 1 1 0 E 1 1 1 0 0 1 1 ...

Page 174: ...number of digits to be converted and the half of D to receive the first ASCII code rightmost or leftmost 8 bits are designated in Di If multiple digits are designated they will be placed in order starting from the designated half of D each requiring two digits If more digits are designated than remain in S counting from the designated first digit further digits will be used starting back at the be...

Page 175: ...he ASCII code When odd parity is designated the leftmost bit of each ASCII character will be adjusted so that there is an odd number of ON bits Flags ER Incorrect digit designator or data area for destination exceeded Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded 5 17 BCD Calculations The BCD calculation instructions INC 38 DEC...

Page 176: ... or the DM area boundary has been exceeded EQ ON when the incremented result is 0 5 17 2 DECREMENT DEC 39 Wd Decrement word BCD IR AR DM HR LR Ladder Symbols Operand Data Areas DEC 39 Wd DEC 39 Wd When the execution condition is OFF DEC 39 is not executed When the execution condition is ON DEC 39 decrements Wd without affecting CY DEC 39 works the same way as INC 38 except that it decrements the v...

Page 177: ...ion condition is ON ADD 30 adds the contents of Au Ad and CY and places the result in R CY will be set if the result is greater than 9999 Au Ad CY CY R Flags ER Au and or Ad is not BCD Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded CY ON when there is a carry in the result EQ ON when the result is 0 If 00002 is ON the program re...

Page 178: ...eight digit BCD addi tion ADDL 54 is designed specifically for this purpose 5 17 6 DOUBLE BCD ADD ADDL 54 Au First augend word BCD IR SR AR DM HR TC LR Ad First addend word BCD IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas R First result word IR AR DM HR LR ADDL 54 Au Ad R ADDL 54 Au Ad R When the execution condition is OFF ADDL 54 is not executed When the execution condition is ON ADDL 5...

Page 179: ...0010 HR 10 CLC 41 00000 ADD 30 LR 22 DM 0012 HR 12 ADB 50 0000 0000 HR 13 Address Instruction Operands 00000 LD 00000 00001 CLC 41 00002 ADDL 54 LR 20 DM 0010 HR 10 00003 ADD 30 LR 22 DM 0012 HR 12 00004 ADB 50 0000 0000 HR 13 5 17 7 BCD SUBTRACT SUB 31 Mi Minuend word BCD IR SR AR DM HR TC LR Su Subtrahend word BCD IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas R Result word IR AR DM HR L...

Page 180: ...ng ladder program clears CY subtracts the contents of DM 0100 and CY from the content of 010 and places the result in HR 20 If CY is set by executing SUB 31 the result in HR 20 is subtracted from zero note that CLC 41 is again required to obtain an accurate result the result is placed back in HR 20 and HR 2100 is turned ON to indicate a negative result If CY is not set by executing SUB 31 the resu...

Page 181: ...HR 20 00007 LD TR 0 00008 AND 25504 00009 OR HR 2100 00010 OUT HR 2100 Address Instruction Operands The first and second subtractions for this diagram are shown below using example data for 010 and DM 0100 Note The actual SUB 31 operation involves subtracting Su and CY from 10 000 plus Mi For positive results the leftmost digit is truncated For negative results the 10s complement is obtained The p...

Page 182: ...i 1 and places the result in R and R 1 If the result is negative CY is set and the 10 s complement of the actual result is placed in R To convert the 10 s complement to the true result subtract the content of R from zero Since an 8 digit constant cannot be di rectly entered use the BSET 71 instruction see Section 5 14 5 to create an 8 digit constant Mi 1 Mi Su 1 Su R 1 R CY CY Flags ER Mi M 1 Su o...

Page 183: ...t subtraction Second subtraction Turned ON to indicate negative result BSET 71 0000 DM 0000 DM 0001 00000 LD 00003 00001 OUT TR 0 00002 CLC 41 00003 SUBL 55 HR 20 120 DM 0100 00004 AND 25504 00005 BSET 71 0000 DM 0000 DM 0001 00006 CLC 41 00007 SUBL 55 DM 0000 DM 0100 DM 0100 00008 LD TR 0 00009 AND 25504 00010 OR HR 2100 00011 OUT HR 2100 Address Instruction Operands Address Instruction Operands ...

Page 184: ...he following program the contents of IR 013 and DM 0005 are multiplied and the result is placed in HR 07 and HR 08 Exam ple data and calculations are shown below the program MUL 32 013 DM 0005 HR 07 00000 R 1 HR 08 R HR 07 0 0 0 8 3 9 0 0 Md IR 013 3 3 5 6 Mr DM 0005 0 0 2 5 X Address Instruction Operands 00000 LD 00000 00001 MUL 32 013 DM 00005 HR 07 Flags ER Md and or Mr is not BCD Indirectly ad...

Page 185: ...R R 1 R 2 x Flags ER Md Md 1 Mr or Mr 1 is not BCD Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded CY ON when there is a carry in the result EQ ON when the result is 0 5 17 11 BCD DIVIDE DIV 33 Dd Dividend word BCD IR SR AR DM HR TC LR Ladder Symbol Dr Divisor word BCD IR SR AR DM HR TC LR Operand Data Areas DIV 33 Dd Dr R R Firs...

Page 186: ...data and calculations are shown below the program DIV 33 020 HR 09 DM 0017 00000 R DM 0017 R 1 DM 0018 1 1 5 0 0 0 0 2 Dd IR 020 3 4 5 2 Quotient Remainder Dd HR 09 0 0 0 3 Address Instruction Operands 00000 LD 00000 00001 DIV 33 020 HR 09 DM 0017 5 17 12 DOUBLE BCD DIVIDE DIVL 57 Dd First dividend word BCD IR SR AR DM HR TC LR Dr First divisor word BCD IR SR AR DM HR TC LR Ladder Symbols Operand ...

Page 187: ...isor word BCD IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas R First result word IR AR DM HR LR FDIV 79 Dd Dr R FDIV 79 Dd Dr R Dr and Dr 1 cannot contain zero Dr and Dr 1 must be in the same data area as must Dd and Dd 1 R and R 1 When the execution condition is OFF FDIV 79 is not executed When the execution condition is ON FDIV 79 divides the floating point value in Dd and Dd 1 by that i...

Page 188: ...t BCD or the DM area boundary has been exceeded EQ ON when the result is 0 The following example shows how to divide two whole four digit numbers i e numbers without fractions so that a floating point value can be ob tained First the original numbers must be placed in floating point form Because the numbers are originally without decimal points the exponent will be 4 e g 3452 would equal 0 3452 x ...

Page 189: ... 0 0 DM 0000 3 4 5 2 HR 01 HR 00 4 3 4 5 2 0 0 0 HR 01 HR 00 4 3 4 5 2 0 0 0 HR 03 HR 02 4 0 0 7 9 0 0 0 DM 0003 DM 0002 2 4 3 6 9 6 2 0 0 4369620 x 102 00000 LD 00000 00001 MOV 21 0000 HR 00 00002 MOV 21 0000 HR 02 00003 MOV 21 4000 HR 01 00004 MOV 21 4000 HR 03 00005 MOVD 83 DM 0000 0021 HR 01 00006 MOVD 83 DM 0000 0300 HR 00 00007 MOVD 83 DM 0001 0021 HR 03 00008 MOVD 83 DM 0001 0300 HR 02 0000...

Page 190: ...xample shows how to take the square root of a four digit num ber and then round the result First the words to be used are cleared to all zeros and then the value whose square root is to be taken is moved to Sq 1 The result which has twice the number of digits required for the answer because the number of digits in the original value was doubled is placed in DM 0102 and the digits are split into tw...

Page 191: ... DM 0100 DM 0101 MOV 21 0000 DM 0103 0000 60170000 7756 932 DM 0103 IR 011 0 0 0 0 0 0 0 0 0000 0000 25505 5600 4900 IR 011 0 0 7 8 Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 BSET 71 0000 DM 0100 DM 0101 00002 MOV 21 010 DM 0101 00003 ROOT 72 DM 0100 DM 0102 00004 MOV 21 0000 011 00005 MOV 21 0000 DM 0103 00006 MOVD 83 DM 0102 0012 011 00007 MOVD 83 DM 0102 0210...

Page 192: ...hen the execution condition is OFF ADB 50 is not executed When the execution condition is ON ADB 50 adds the contents of Au Ad and CY and places the result in R CY will be set if the result is greater than FFFF Au Ad CY CY R Flags ER Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded CY ON when the result is greater than FFFF EQ ON ...

Page 193: ...ADB 50 twice ADB 50 is also used to place the carry into DM 0302 one word greater than the rest of the answer The complete answer thus ends up in DM 0300 through DM 0302 CLC 41 00000 ADB 50 LR 20 DM 0200 DM 0300 ADB 50 LR 21 DM 0201 DM 0301 ADB 50 0000 0000 DM 0302 Address Instruction Operands 00000 LD 00000 00001 CLC 41 00002 ADB 50 LR 20 DM 0200 DM 0300 00003 ADB 50 LR 21 DM 0201 DM 0301 00004 A...

Page 194: ...i Su R When the execution condition is OFF SBB 51 is not executed When the execution condition is ON SBB 51 subtracts the contents of Su and CY from Mi and places the result in R If the result is negative CY is set and the 2 s complement of the actual result is placed in R Mi Su CY CY R Flags ER Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has ...

Page 195: ...1 00003 SBB 51 010 DM 0100 HR 10 00004 SBB 51 011 DM 0101 HR 11 00005 AND 25505 00006 CLC 41 00007 SBB 51 0000 HR 10 HR 10 00008 SBB 51 0000 HR 11 HR 11 00009 LD TR 0 00010 AND NOT 25504 00011 MOV 21 0000 HR 12 00012 LD TR 0 00013 AND 25504 00014 MOV 21 0000 HR 12 In the case below 20F55A10 B8A360E3 97AE06D3 In the the lower 4 digit subtraction Su Mi so CY SR 25504 becomes 1 and the result of the ...

Page 196: ... IR SR AR DM HR TC LR Mr Multiplier word binary IR SR AR DM HR TC LR Ladder Symbols Operand Data Areas R First result word IR AR DM HR LR MLB 52 Md Mr R MLB 52 Md Mr R When the execution condition is OFF MLB 52 is not executed When the execution condition is ON MLB 52 multiplies the content of Md by the con tents of Mr places the rightmost four digits of the result in R and places the leftmost fou...

Page 197: ...ns 0 Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded EQ ON when the result is 0 5 19 Logic Instructions The logic instructions COM 29 ANDW 34 ORW 35 XORW 36 and XNRW 37 perform logic operations on word data 5 19 1 COMPLEMENT COM 29 Wd Complement word IR AR DM HR LR Ladder Symbols Operand Data Areas COM 29 Wd COM 29 Wd When the ex...

Page 198: ...e result in R 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 15 00 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 15 00 15 00 I1 I2 R Flags ER Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundary has been exceeded EQ ON when the result is 0 5 19 3 LOGICAL OR ORW 35 I1 Input 1 IR SR AR DM HR TC LR I2 Input 2 IR SR AR DM HR TC LR Ladder Symbols Operand...

Page 199: ...nd Data Areas R Result word IR AR DM HR LR XORW 36 I1 I2 R XORW 36 I1 I2 R When the execution condition is OFF XORW 36 is not executed When the execution condition is ON XORW 36 exclusively OR s the contents of I1 and I2 bit by bit and places the result in R 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 15 00 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 15 00 15 00 I1 I2 R Flags ER Indirectly...

Page 200: ...ble you to reuse a given set of instructions When the main program calls a subroutine control is transferred to the subroutine and the subroutine instructions are executed The instructions within a subroutine are written in the same way as main program code When all the subroutine instructions have been ex ecuted control returns to the main program to the point just after the point from which the ...

Page 201: ... 4 INTERRUPT CONTROL INT 89 for details SBN 92 is used to mark the beginning of a subroutine program RET 93 is used to mark the end Each subroutine is identified with a subroutine number N that is programmed as a definer for SBN 92 This same subroutine num ber is used in any SBS 91 that calls the subroutine see next subsection No subroutine number is required with RET 93 All subroutines must be pr...

Page 202: ...routine Main program SBS 91 may be used as many times as desired in the program i e the same subroutine may be called from different places in the program SBS 91 may also be placed into a subroutine to shift program execution from one subroutine to another i e subroutines may be nested When the second subroutine has been completed i e RET 93 has been reached program execution returns to the origin...

Page 203: ... C C C C D D E E OFF execution conditions for subroutines 00 and 01 ON execution condition for subroutine 00 only ON execution condition for subroutine 01 only ON execution conditions for subroutines 00 and 01 Flags ER A subroutine does not exist for the specified subroutine number A subroutine has called itself Subroutines have been nested to more than sixteen levels Caution SBS 91 will not be ex...

Page 204: ...d 99 99 seconds The decimal point is not in put The time interval can be changed at any time To cancel the scheduled interrupt set the time interval to 00 00 seconds Caution If the scheduled execution time of the subroutine becomes too large it will have a serious effect on the overall execution time of the main program Therefore you should take extra care to write a subroutine that is fast and ef...

Page 205: ...xecution control returns to the point in the main pro gram where it was suspended SBN 92 99 INT 89 000 004 0002 RET 93 INT 89 001 004 0002 25315 Main program Subroutine Set at 20 ms Main program execution Interrupts every 20 ms Returned from scheduled interrupt rou tine First Cycle Flag Address Instruction Operands Address Instruction Operands 00000 LD 25315 00001 INT 89 001 004 0002 00002 INT 89 ...

Page 206: ... start execution of the step SNXT 09 is used with the same control bit as used for STEP 08 If SNXT 09 is executed with an ON execution condition the step with the same control bit is executed If the execution condition is OFF the step is not executed The SNXT 09 instruction must be written into the pro gram so that it is executed before the program reaches the step it starts It can be used at diff...

Page 207: ...t with STEP 08 and generally ends with SNXT 09 see example 3 below for an exception When steps are programmed in series three types of execution are possible sequential branching or parallel The execution conditions for and the positioning of SNXT 09 determine how the steps are executed The three examples given below demonstrate these three types of step execu tion Interlocks jumps SBN 92 and END ...

Page 208: ...hree examples demonstrate the three types of execution con trol possible with step programming Example 1 demonstrates sequential execution example 2 branching execution and example 3 parallel execu tion The following process requires that three processes loading part installa tion and inspection discharge be executed in sequence with each process being reset before continuing on the the next proce...

Page 209: ...d for execution control Process A Process B Process C Loading Part Installation Inspection discharge SW1 SW2 SW3 SW4 The program for this process shown below utilizes the most basic type of step programming each step is completed by a unique SNXT 09 that starts Step Instructions Section 5 21 ...

Page 210: ...002 SW2 00003 SW3 00004 SW4 Process A started Process A reset Process B started Process B reset Process C started Process C reset Address Instruction Operands Address Instruction Operands 00000 LD 00001 00001 SNXT 09 12800 00002 STEP 08 12800 Process A 00100 LD 00002 00101 SNXT 09 12801 00102 STEP 08 12801 Process B 00100 LD 00003 00101 SNXT 09 12802 00102 STEP 08 12802 Process C 00200 LD 00004 00...

Page 211: ...ocess A Printer SW D The following diagram demonstrates the flow of processing and the switches that are used for execution control Here either process A or process B is used depending on the status of SW A1 and SW B1 Process A Process C End SW A1 SW B1 SW A2 SW B2 SW D Process B The program for this process shown below starts with two SNXT 09 in structions that start processes A and B Because of ...

Page 212: ...ss A reset Process C started Process B reset Process C started Process C reset 00001 SW A1 SNXT 09 HR 0000 00002 SW B2 00001 SW A1 Address Instruction Operands Address Instruction Operands 00000 LD 00001 00001 AND NOT 00002 00002 SNXT 09 HR 0000 00003 LD NOT 00001 00004 AND 00002 00005 SNXT 09 HR 0001 00006 STEP 08 HR 0000 Process A 00100 LD 00003 00101 SNXT 09 HR 0002 00102 STEP 08 HR 0001 Proces...

Page 213: ...rocess D SW3 SW4 SW 1 and SW2 both ON SW5 and SW6 both ON The program for this operation shown below starts with two SNXT 09 in structions that start processes A and C These instructions branch from the same instruction line and are always executed together starting steps for both A and C When the steps for both A and C have finished the steps for process B and D begin immediately When both proces...

Page 214: ...Process B Process C 00002 SW3 00005 SW7 Process A started Process A reset Process B started Process E reset 00001 SW1 and SW2 SNXT 09 LR 0000 SNXT 09 LR 0002 Process C started 01101 SNXT 09 LR 0004 00004 SW5 and SW6 LR 0003 STEP 08 LR 0002 Process E started Used to turn off process D 00003 SW4 SNXT 09 LR 0003 STEP 08 LR 0003 Process C reset Process D started Process D Process E Step Instructions S...

Page 215: ...ing user error codes and messages counting ON bits setting the watchdog timer and refreshing I O during program execution 5 22 1 FAILURE ALARM FAL 06 and SEVERE FAILURE ALARM FALS 07 N FAL number 00 to 99 Ladder Symbols Definer Data Areas FAL 06 N FAL 06 N N FAL number 01 to 99 FALS 07 N FAL 06 and FALS 07 are provided so that the programmer can output error numbers for use in operation maintenanc...

Page 216: ...cuted first remove the cause of the error and then clear the FAL area through the Programming Console see 4 5 5 Clearing Error Messages 5 22 2 CYCLE TIME SCAN 18 Mi Multiplier BCD IR SR AR DM HR TC LR Not used Ladder Symbols Operand Data Areas Not used SCAN 18 Mi SCAN 18 Mi Limitations Can be performed with the CPU11 E only Only the rightmost three digits of Mi are used Description SCAN 18 is used...

Page 217: ...n the buffer they are displayed on a first in first out basis Since it is possible that more than three MSG 46 s may be executed within a single cycle there is a prior ity scheme based on the area where the messages are stored for the selec tion of those messages to be buffered The priority of the data areas is as follows for message display LR IR I O IR not I O HR AR TC DM In handling messages fr...

Page 218: ...s Can be performed with the CPU11 E only S through S 15 must be in the same data area and must be in ASCII The message will be truncated if a null character 00 is contained between S and S 15 Description LMSG 47 is used to output a 32 character message to a Programming Con sole The message to be output must be in ASCII beginning in word S and ending in S 15 unless a shorter message is desired A sh...

Page 219: ...mming Console can be switched to TERMINAL mode by pressing the CHG key on the Programming Console The Programming Console will enter the CONSOLE mode when the CHG key is pressed again Instructions MSG 46 LMSG 47 and the keyboard mapping function are executed in the CONSOLE mode 5 22 6 SET SYSTEM SYS 49 P Parameters Not used Operand Data Areas Not used IR SR AR DM HR TC LR TR Ladder Symbols SYS 49 ...

Page 220: ...tion 5 22 7 BIT COUNTER BCNT 67 N Number of words BCD IR AR DM HR TC LR SB Source beginning word IR SR AR DM HR TC LR Operand Data Areas R Destination word IR AR DM HR TC LR Ladder Symbols BCNT 67 N SB R BCNT 67 N SB R Limitations N cannot be 0 When the execution condition is OFF BCNT 67 is not executed When the execution condition is ON BCNT 67 counts the total number of bits that are ON in all w...

Page 221: ...CAL 69 sine function to calculate the sine of 30 The sine function is specified when C is 0000 Input data x Result data S DM 0000 D DM 0100 0 101 100 10 1 10 1 10 2 10 3 10 4 0 3 0 0 5 0 0 0 VCAL 69 0000 DM 0000 DM 0100 00000 Enter input data not exceeding 0900 in BCD form Result data has four significant digits fifth and higher digits are ignored The result for sin 90 will be 0 9999 not 1 Address...

Page 222: ...ot allow the data block to overlap the RAM and EEPROM sections of the DM area The EEPROM section begins at DM1000 Word Coordinate C 1 Xm max X value C 2 Y0 C 3 X1 C 4 Y1 C 5 X2 C 6 Y2 C 2m 1 Xm C 2m 2 Ym The following example demonstrates the construction of a linear approxima tion with 12 line segments The block of data is continuous as it must be from DM 0000 to DM 0026 C to C 2 12 2 The input d...

Page 223: ...e time is longer than the time set for the watchdog timer 9F will be output to the FAL area and the CPU will stop If the cycle time exceeds 6 500 ms a FALS 9F will be generated and the sys tem will stop Timers might not function properly when the cycle time exceeds 100 ms When using WDT 94 the same timer should be repeated in the program at intervals that are less than 100 ms apart TIMH 15 should ...

Page 224: ...DM HR TC LR Ladder Symbols SEND 90 S D C SEND 90 S D C Limitations Can be performed with the CPU11 E only C through C 2 must be within the same data area and must be within the values specified below To be able to use SEND 90 the system must have a SYSMAC NET Link or SYSMAC LINK Unit mounted When the execution condition is OFF SEND 90 is not executed When the execution condition is ON SEND 90 tran...

Page 225: ...sponse time will be 2 seconds if the limit is set to 0hex There will be no time limit if the time limit is set to FFhex Bits 08 to 11 No of retries 0 to 15 in hexadecimal i e 0hex to Fhex Bit 12 Set to 0 Bit 13 ON Response not returned OFF Response returned Bit 14 ON Operating level 0 OFF Operating level 1 Bit 15 Set to 1 C 2 Destination node 0 to 62 in 2 digit hexadecimal i e 00hex to 3Ehex Set t...

Page 226: ... S from a node on the SYSMAC NET Link SYSMAC LINK System to words beginning at D The control words beginning with C provide the number of words to be received the source node and other transfer parameters The status of bit 15 of C 1 determines whether the instruction is for a SYSMAC NET Link System or a SYSMAC LINK System Control Data SYSMAC NET Link Systems The source port number is always set to...

Page 227: ...002 IR 003 IR 004 IR 005 LR 20 LR 21 LR 22 LR 23 LR 24 DM 0010 DM 0011 DM 0012 15 0 RECV 98 001 LR 20 DM 0010 00000 Node 10 Address Instruction Operands 00000 LD 00000 00001 RECV 98 001 LR 20 DM 0010 Flags ER The specified node number is greater than 126 in a SYSMAC NET Link System or greater than 62 in a SYSMAC LINK System The received data overflows the data area boundaries Indirectly addressed ...

Page 228: ... types Time out error command response time greater than 1 second Transmission data errors Timing Instruction received Transmission completes normally Instruction received Transmission error Instruction received Successful send receive execution Send receive error Data is transmitted for SEND 90 and RECV 98 for all PCs when SEND 90 RECV 98 is executed Final processing for transmissions recep tions...

Page 229: ...ify the 10 words to be transmitted to node 3 in operating level 1 of network 00 NSB Turns ON to indicate transmission error Transmitted data moved into words beginning at DM 0030 for storage 12802 prevents execution of RECV 98 when SEND 90 above has not completed IR 00001 is turned ON to start transmission Data moved into control data words to spec ify the 16 words to be transmitted from node 126 ...

Page 230: ...0012 AND 25203 00013 OUT 00200 00014 LD 12800 00015 AND 25204 00016 DIFU 13 12801 00017 LD 00001 00018 AND 25204 00019 AND NOT 12800 00020 LD 12803 00021 KEEP 11 12802 00022 LD 12802 00023 AND 25204 00024 AND NOT 25203 00025 XFER 70 0016 000 DM 0030 00026 LD 12802 00027 MOV 21 0010 DM 0003 00028 MOV 21 0000 DM 0004 00029 MOV 21 007E DM 0005 00030 RECV 98 HR 10 LR 10 DM 0003 00031 LD 12802 00032 AN...

Page 231: ...desired control action at the right time This section explains the cycle and shows how to calculate the cycle time and I O response times I O response times in Link Systems are described in the individual System Manuals These are listed at the end of Section 1 Introduction 6 1 Cycle Time 220 6 1 1 CPU01 E 03 E Cycle Time 221 6 1 2 CPU11 E Cycle Time 224 6 2 Calculating Cycle Time 226 6 2 1 PC with...

Page 232: ...ffective pro gramming and PC operations The major factors in determining program timing are the cycle time and the I O response time One scan of CPU operation is called a cycle the time required for one cycle is called the cycle time The time required to produce a control output signal following reception of an input signal is called the I O response time The operation of the CPU11 E is different ...

Page 233: ...indicator Resets watchdog timer and program address counter Executes program Resets watchdog timer Refreshes input bits and output signals ALARM Flashing ERROR Solid ON Services Peripheral devices Initialization on power up Overseeing processes Program execution I O refreshing Link Unit servicing Peripheral device servicing The first three operations immediately after power application are perform...

Page 234: ... device servicing 0 ms when no devices are mounted 0 8 ms when T is less than or equal to 13 ms T x 0 06 ms when T is greater than 13 ms T is the total cycle time for operations 1 2 4 and 5 Commands from Programming Devices and Interface Units processed 4 Program execution Total execution time for all instructions varies with program size the instructions used and execution conditions Refer to 6 3...

Page 235: ... NC211 6 ms C200H AD001 2 3 ms C200H AD002 2 0 ms C200H DA001 2 0 ms C200H TS001 TS101 1 8 ms each C200H TCjjj see note 1 4 0 ms each C200H ASC02 2 0 ms each normally 6 0 ms for format C200H IDS01 V1 IDS21 2 5 ms each normally 6 5 ms for command transfer C200H OV001 4 5 ms C200H TVjjj see note 1 4 0 ms C200H PID0j see note 2 4 0 ms C200H FZ001 2 3 ms C200H CP114 3 2 ms Note 1 jjj 001 002 003 101 1...

Page 236: ...utput signals ALARM Flashing ERROR Solid ON Services Peripheral devices Resets watchdog timer and program address counter End of program YES SCAN 18 executed NO YES Resets watchdog timer and waits until the set cycle time has elapsed Calculates cycle time Services SYSMAC LINK and SYSMAC NET Link Units Initialization on power up Overseeing processes Program execution Cycle time calculation I O refr...

Page 237: ...bles in 6 1 1 CPU01 E 03 E Cycle Time for details on PC Link and Spe cial I O Unit refresh time Input bits set according to status of input signals Output signals sent according to status of output bits in memory Inputs and Outputs in Remote I O Systems refreshed Special I O Units serviced 5 Host Link Unit servicing 8 ms max per unit Commands from computers connected through Rack mounting Host Lin...

Page 238: ...er of I O points the programming instructions used and whether or not peripheral devices are employed This section shows some basic cycle time calculation examples To simplify the examples the instructions used in the programs have been assumed to be all either LD or OUT The average execution time for the instructions is thus 0 6 µs Operating times are given in the table in Section 6 3 6 2 1 PC wi...

Page 239: ... 8 points x 4 x 40 µs 0 92 ms x 70 µs 8 points 16 points x 2 8 points x 5 The cycle time would thus be 2 6 ms 0 8 ms 4 7 ms 0 9 ms 9 0 ms 6 2 2 PC with Link Units Here the cycle time is computed for a PC with a CPU01 E or 03 E CPU Unit three 8 point Input Units three 8 point Output Units a Host Link Unit and a Remote I O Master Unit connected to a Remote I O Slave Rack con taining four 16 point In...

Page 240: ...he content of any word except for indirectly addressed DM words Indirectly addressed DM words which create longer execution times when used are indicated by DM Execution times for most instructions depend on whether they are executed with an ON or an OFF execution condition Exceptions are the ladder dia gram instructions OUT and OUT NOT which require the same time regard less of the execution cond...

Page 241: ... 181 R 191 IL 30 JMP 30 With 250 word shift register 1 44 ms R 1 81 ms IL 30 JMP 30 KEEP 11 1 13 CNTR 12 Constant for SV 111 R 85 IL 49 DM for SV 205 JMP 49 DIFU 13 93 Normal 93 IL 93 JMP 84 DIFD 14 92 Normal 92 IL 92 JMP 84 TIMH 15 Interrupt Constant for SV 120 R 199 Normal cycle 135 IL 199 Interrupt DM for SV 120 JMP 73 Normal cycle 135 R 291 IL 291 JMP 73 WSFT 16 When shifting 1 word 170 3 When...

Page 242: ... 25 When shifting DM 158 ASR 26 When shifting a word 72 2 25 When shifting DM 158 ROL 27 When rotating a word 77 2 25 When rotating DM 162 ROR 28 When rotating a word 77 2 25 When rotating DM 162 COM 29 When inverting a word 67 2 25 When inverting DM 152 ADD 30 Constant word b word 153 3 75 DM DM b DM 415 SUB 31 Constant word b word 161 3 75 DM DM b DM 422 MUL 32 Constant x word b word 480 3 75 DM...

Page 243: ...5 3 75 DM DM b DM 504 MULL 56 Word x word b word 1 14 ms 3 75 DM x DM b DM 1 39 ms DIVL 57 Word word b word 3 25 ms 3 75 DM DM b DM 3 39 ms BINL 58 When converting words to words 350 3 When converting DM to DM 511 BCDL 59 When converting words to words 588 3 When converting DM to DM 750 CMPL 60 When comparing words to words 380 3 75 When comparing DM to DM 543 CTW 63 When transferring from words t...

Page 244: ... SRD 75 When shifting 1 word 193 3 When shifting 1 000 DM words using DM 33 ms MLPX 76 When decoding word to word 203 3 75 When decoding DM to DM 568 DMPX 77 When encoding a word to a word 225 3 75 When encoding DM to DM 551 SDEC 78 When decoding a word to a word 235 3 75 When decoding DM to DM 571 FDIV 79 Word word b word equals 0 632 3 75 Word word b word doesn t equal 0 1 77 ms DM DM b DM 2 1 m...

Page 245: ...reading interrupt mask 265 3 75 When masking and clearing interrupt 265 SEND 90 1 word transmit 563 3 75 1000 word transmit 752 SBS 91 158 2 25 SBN 92 RET 93 198 1 5 WDT 94 35 2 25 IORF 97 1 word refresh 450 3 30 word refresh 4 ms RECV 98 1 word refresh 559 3 75 1000 word refresh 764 Instruction Execution Times Section 6 3 ...

Page 246: ...ponds most quickly when it receives an input signal just prior to the I O refresh period in the cycle Once the input bit corresponding to the signal has been turned ON the program will have to be executed once to turn ON the output bit for the desired output signal and then the I O refresh operation would have to be repeated to refresh the output bit The I O re sponse time in this case is thus fou...

Page 247: ...le time Input signal Output signal Cycle Cycle time I O refresh I O response time Input ON delay Instruction execution Instruction execution Instruction execution CPU reads input signal Output ON delay Cycle time Maximum I O response time input ON delay cycle time x 2 output ON delay The data in the following table would produce the minimum and maximum cycle times shown calculated below Input ON d...

Page 248: ... 7 1 1 Bit Digit Monitor 238 7 1 2 Forced Set Reset 241 7 1 3 Forced Set Reset Cancel 243 7 1 4 Hexadecimal BCD Data Modification 244 7 1 5 Hex ASCII Display Change 245 7 1 6 3 word Monitor 246 7 1 7 3 word Data Modification 247 7 1 8 Binary Monitor 248 7 1 9 Binary Data Modification 249 7 1 10 Changing Timer Counter SV 251 7 2 Program Backup and Restore Operations 254 7 2 1 Saving Program Memory ...

Page 249: ...r the digit contents of the word will be displayed and when a timer or counter number is designated the PV of the timer will be displayed and a small box will appear if the completion flag of a timer or counter is ON When multiple words are monitored a caret will appear under the leftmost digit of the address designation to help distinguish between different addresses The status of TR bits and SR ...

Page 250: ...y Sequence Cancels monitor operation Clears leftmost address The following examples show various applications of this monitor operation Program Read then Monitor Indicates Completion flag is ON Monitor operation is cancelled 00100 00100READ TIM 000 T000 1234 T0001 _0000 00100 TIM 001 Examples Monitoring Operation and Modifying Data Section 7 1 ...

Page 251: ...240 Bit Monitor 00000 00000 LD 00001 00001 ON 00000 CONT 00001 Word Monitor 00000 00000 CHANNEL 000 00000 CHANNEL LR 01 cL01 FFFF cL00 0000 Monitoring Operation and Modifying Data Section 7 1 ...

Page 252: ...e Set in operation Cancels monitoring of leftmost address Monitor operation canceled 7 1 2 Forced Set Reset When the Bit Digit Monitor operation is being performed and a bit timer or counter address is leftmost on the display PLAY SET can be pressed to turn ON the bit start the timer or increment the counter and REC RESET can be pressed to turn OFF the bit or reset the timer or counter Timers will...

Page 253: ...erruption 4 The I O Table Registration operation is performed Note With the CPU11 E the bit status will be maintained when switching from PROGRAM to MONITOR mode if the Force Status Hold Flag is ON and has been enabled with the Set System operation SYS 49 This operation can be used in MONITOR mode to check wiring of outputs from the PC prior to actual program execution This operation cannot be use...

Page 254: ...ing 00500 OFF When the time is up 00500 goes ON again Timing not done in PROGRAM mode 0010000500 OFF OFF T0000010000500 OFF OFF T0000010000500 0123 OFF OFF T0000010000500 0000 OFF ON T0000010000500 0123 OFF OFF T0000010000500 _0000 ON ON T0000010000500 0123 ON OFF T0000010000500 0122 ON OFF T0000010000500 _0000 ON ON 0010000500 OFF OFF 0010000500 ON OFF 7 1 3 Forced Set Reset Cancel This operation...

Page 255: ...ut to change the value SR words cannot be changed If a timer or counter is leftmost on the display the PV will be displayed and will be the value changed See 7 1 10 Changing Timer Counter SV for the procedure to change SV PV can be changed in MONITOR mode only when the timer or counter is operating To change contents of the leftmost word address press CHG input the de sired value and press WRITE K...

Page 256: ... Timing Timing 00000 00000 TIM 000 T000 0122 00000PRES VAL T000 0119 00000PRES VAL T000 0100 0200 T000 0199 7 1 5 Hex ASCII Display Change This operation converts DM data displays from 4 digit hexadecimal data to ASCII and vice versa Key Sequence Word currently displayed Example Monitoring Operation and Modifying Data Section 7 1 ...

Page 257: ...cify the lowest numbered word press MONTR and then press EXT to display the data contents of the specified word and the two words that follow it A CLR entry changes the Three word Monitor operation to a single word dis play Key Sequence Single word monitor in progress Example Monitoring Operation and Modifying Data Section 7 1 ...

Page 258: ... the contents of a word during the 3 Word Monitor operation The blinking square indicates where the data can be changed After the new data value is keyed in pressing WRITE causes the original data to be overwritten with the new data If CLR is pressed before WRITE the change operation will be cancelled and the previous 3 word Monitor op eration will resume Key Sequence 3 words currently displayed D...

Page 259: ... 2345 89AB D0002D0001D0000 0001 4567 89AB 7 1 8 Binary Monitor You can specify that the contents of a monitored word be displayed in binary by pressing SHIFT and MONTR after the word address has been input Words can be successively monitored by using the up and down keys to in crement and decrement the displayed word address To clear the binary dis play press CLR Key Sequence Word Binary monitor c...

Page 260: ... shifted to the left with the up key and to the right with the down key indicates the position of the bit that can be changed After positioning to the desired bit a 0 or a 1 can then be entered as the new bit value The bit can also be Force Set or Force Reset by pressing SHIFT and either PLAY SET or REC RESET An S or R will then appear at that bit posi tion Pressing the NOT key will clear the forc...

Page 261: ...250 Key Sequence Word currently displayed in binary Force Status Clear Monitoring Operation and Modifying Data Section 7 1 ...

Page 262: ... the SV can be changed while the program is being exe cuted Incrementing and decrementing the SV is possible only when the SV has been entered as a constant To use either method first display the address of the timer or counter whose SV is to be changed presses the down key and then press CHG The new value can then be input numerically and WRITE pressed to change the SV or EXT can be pressed follo...

Page 263: ...t changing from a con stant to an address and incrementing to a new constant 00000 00000 TIM 000 00201SRCH TIM 000 00201 TIM DATA 0123 00201 TIM DATA T000 0123 00201 TIM DATA T000 0123 0124 00201 TIM DATA 0124 00201 DATA T000 0123 c 00201 DATA T000 0123 c010 00201 TIM DATA 010 Example Inputting New SV and Changing to Word Designation Monitoring Operation and Modifying Data Section 7 1 ...

Page 264: ...00 00000 TIM 000 00201SRCH TIM 000 00201 TIM DATA 0123 00201 TIM DATA T000 0123 00201DATA U D T000 0123 0123 00201DATA T000 0123 0122 00201DATA T000 0123 0123 00201DATA T000 0123 0124 00201DATA T000 0124 00201 TIM DATA 0124 Incrementing and Decrementing Monitoring Operation and Modifying Data Section 7 1 ...

Page 265: ...at any time by pressing CLR The following error messages may appear during cassette tape operations Message Meaning and appropriate response 0000 ERR FILE NO File number on cassette and designated file number are not the same Repeat the operation using the correct file number MT VER ERR Cassette tape contents differs from that in the PC Check content of tape and or the PC MT ERR Cassette tape is f...

Page 266: ...e the cassette leader tape into consideration according to the following a When recording to tape the leader tape needs to be allowed to pass before the data transmission to the tape player starts b When restoring from tape or comparing data the Programming Console needs to be ready to receive data before the data is transfered from the tape Program Backup and Restore Operations Section 7 2 ...

Page 267: ...ADDR 03890 00345MT STOP ADDR 05789 00345MT RECORD FILE NO 86031400 02420MT RECORD FILE NO 86031400 04801MT RECORD END 01 05 6KW 04801MT DISCONTD END 01 05 6KW 05789RECORD END END 01 06 8KW 7 2 2 Restoring or Comparing Program Memory Data This operation is used to restore Program Memory data from a cassette tape or to compare Program Memory data with the contents on a cassette tape The procedure is...

Page 268: ...the tape the restoring or comparison operation will continue through the end of the tape unless CLR is pressed to cancel Key Sequence PLAY SET EXT A 0 WRITE CLR SHIFT Start tape recorder playback File no Start address Within about 5 seconds These times take the cassette leader tape into consideration according to the following a When recording to tape the leader tape needs to be allowed to pass be...

Page 269: ...801MT VER END 01 05 6KW 04801MT DISCONTD 05 6KW 05789VER OK END 01 05 6KW 00000MT FILE NO 86031400 00000MT START ADDR 00000 00000MT START ADDR 00345 7 2 3 Saving Restoring and Comparing DM Data The procedures for saving restoring and comparing DM area data are identi cal to those for Program Memory except that the DM area is specified and start and stop addresses are not required Cassette tape ope...

Page 270: ...ss before the data transmission to the tape player starts b When restoring from tape or comparing data the Programming Console needs to be ready to receive data before the data is transfered from the tape Selecting the DM area Start recording Wait about 5 seconds Recording in progress Recording stopped using CLR key Recording stops at the end 00000 00000MT UM 0 DM 1 D0000MT FILE NO 00000000 D0000M...

Page 271: ...key Restoring stopped at the end 00000 00000MT UM 0 DM 1 D0000MT FILE NO 00000000 D0000MT FILE NO 00000012 D0000MT PLAY FILE NO 00000012 D0127MT PLAY FILE NO 00000012 D0127MT DISCONTD FILE NO 00000012 D1999MT END FILE NO 00000012 Blinking Example Restoring DM Data Program Backup and Restore Operations Section 7 2 ...

Page 272: ...R Key Verification stopped at the end 00000 00000MT UM 0 DM 1 D0000MT FILE NO 00000000 D0000MT FILE NO 00000012 D0000MT VER FILE NO 00000012 D0127MT VER FILE NO 00000012 D0127MT DISCONTD FILE NO 00000012 D1999VER OK FILE NO 00000012 Blinking Example Comparing DM Data Program Backup and Restore Operations Section 7 2 ...

Page 273: ...rdware and software errors that occur during PC operation Program input errors are described in 4 6 Inputting Modifying and Checking the Program Although described in Section 3 Memory Areas flags and other error information provided in SR and AR areas are listed in 8 5 Error Flags 8 1 Alarm Indicators 264 8 2 Programmed Alarms and Error Messages 264 8 3 Reading and Clearing Errors and Messages 264...

Page 274: ...n or directly affect any outputs from the PC FALS 07 is also used with a FAL number which is output to the same loca tion in the SR area when FALS 07 is executed Executing FALS 07 will stop PC operation and will cause all outputs from the PC to be turned OFF When FAL 06 is executed with a function number of 00 the current FAL number contained in the SR area is cleared and replaced by another if mo...

Page 275: ...pear on the display The following error messages appear before program execution has been started The POWER indicator will be lit and the RUN indicator will not be lit for either of these The RUN output will be OFF for each of these errors Error and message FAL no Probable cause Possible correction Waiting for start input CPU WAIT G None Start input on CPU Power Unit is OFF Short start input termi...

Page 276: ... B0 or B1 Error occurred in transmissions between Remote I O Units Check transmission line between PC and Master and between Remote I O Units SPECIAL UNIT ERR Special I O error D0 Error has occurred in PC Link Unit Remote I O Master Unit between a Host SYSMAC LINK or SYSMAC NET Link Unit and the CPU or in refresh between Special I O Unit and the CPU Determine the unit number of the unit which caus...

Page 277: ...the number of the Rack where the error was detected Check cable connections between the I O Units and Racks Too many Units I O UNIT OVER E1 Two or more Special I O Units are set to the same unit number CPU01 E 02 A unit is installed in an unusable slot CPU11 E Two SYSMAC NET Link or SYSMAC LINK Units share the same operating level Perform the I O Table Read operation to check unit numbers and elim...

Page 278: ... area for SEND 90 RECV 98 in SYSMAC LINK SYSMAC NET Link System 24700 to 25015 PC Link Unit Run and Error Flags 25100 to 25115 Remote I O Error Flags 25200 SYSMAC LINK SYSMAC NET Link Level 0 SEND 90 RECV 98 Error Flag 25203 SYSMAC LINK SYSMAC NET Link Level 1 SEND 90 RECV 98 Error Flag 25206 Rack mounting Host Link Unit Level 1 Error Flag 25208 CPU mounting Host Link Unit Error Flag 25300 to 2530...

Page 279: ...ag 0200 to 0204 Error Flags for Slave Racks 0 to 4 0300 to 0315 Optical I O Units 0 to 7 Error Flags 0400 to 0415 Optical I O Units 8 to 15 Error Flags 0500 to 0515 Optical I O Units 16 to 23 Error Flags 0600 to 0615 Optical I O Units 24 to 31 Error Flags 0713 to 0715 Error History Bits 1114 Communications Controller Error Flag Level 0 1115 EEPROM Error Flag for operating level 0 1514 Communicatio...

Page 280: ...AC NET Link Systems C200H CPU11 E 24 VDC C200H CPU03 E Memory Unit CMOS RAM Unit built in backup battery UM 3K words DM 1K words C200H MR431 UM 7K words DM 1K words C200H MR831 CMOS RAM Unit capacitor backup UM 3K words DM 1K words C200H MR432 UM 7K words DM 1K words C200H MR832 EPROM Unit EPROM ordered separately UM 7K words DM 1K words C200H MP831 EEPROM Unit UM 3K words DM 1K words C200H ME431 ...

Page 281: ... 24 VDC For resistive loads C200H OC222 16 pts 2 A 250 VAC 24 VAC For resistive loads C200H OC225 5 pts 2 A 250 VAC 24 VDC For resistive loads Independent commons C200H OC223 8 pts 2 A 250 VAC 24 VDC For resistive loads Independent commons C200H OC224 Triac Output Unit 8 pts 1 A 120 VAC C200H OA121 E 8 pts 1 A 250 VAC C200H OA221 12 pts 0 3 A 250 VAC C200H OA222 Transistor Output U it 8 pts 1 A 12...

Page 282: ...1 to 5 0 to 10 V 4 inputs C200H AD001 4 to 20 mA 1 to 5 0 to 10 10 to 10 V 8 inputs C200H AD002 Analog Output Unit 4 to 20 mA 1 to 5 0 to 10 V 2 outputs C200H DA001 Temperature Sensor Units Thermocouple K CA or J IC switchable 4 inputs C200H TS001 Thermocouple K CA or L Fe CuNi switchable 4 inputs C200H TS002 Platinum resistance thermometer JPt switchable DIN stan dards 4 inputs C200H TS101 Platin...

Page 283: ...V600 DjjRjj see note EEPROM type for V600 H series V600 DjjPjj Voice Unit 60 messages max message length 32 48 or 64 s switchable C200H OV001 Connecting Cable RS 232C C200H CN224 Fuzzy Logic Unit Up to 8 inputs and 4 outputs I O to and from specified data area words C200H FZ001 Note For Read Write Head and Data Carrier combinations refer to the V600 FA ID System R W Heads and EE PROM Data Carriers...

Page 284: ...lane C200H ATTA1 For 8 slot Backplane C200H ATT81 For 5 slot Backplane C200H ATT51 For 3 slot Backplane C200H ATT31 I O Bracket For 5 slot Backplane C200H ATT53 For 8 slot Backplane C200H ATT83 For 3 slot Backplane C200H ATT33 Memory Unit Lock Fitting To secure Memory Unit to CPU C200H ATT03 External Connector Solder terminal 40 pin with connector cover C500 CE401 Solderless terminal 40 pin with c...

Page 285: ...hen connecting more than 33 Units in a Remote Subsystem power supply 85 to 250 VAC PCF 3G5A2 RPT01 E Link Adapters Name Specifications Model no Link Adapter 3 RS 422 connectors 3G2A9 AL001 3 optical connectors APF PCF 3G2A9 AL002 PE 3 optical connectors PCF 3G2A9 AL002 E 1 connector for RS 232C 2 for RS 422 3G2A9 AL003 1 connector each for APF PCF RS 422 and RS 232C 3G2A9 AL004 PE 1 connector each...

Page 286: ...ngth for Units having the suffix P in their model number is 200 m The maximum length for Units without the suffix P in their model number is 800 m Product Description Model no Optical Fiber Cable f i d 0 1 m w connector Ambient temperature 10 to 70 C 3G5A2 OF011 p for indoors 1 m w connector 3G5A2 OF101 2 m w connector 3G5A2 OF201 3 m w connector 3G5A2 OF301 5 m w connector 3G5A2 OF501 10 m w conn...

Page 287: ...or C series PCs 3G2A5 PRT01 E Memory Pack for Printer Interface For C200H C1000H C2000H C2000 MP103 EV3 Printer Connecting Cable For printer 2 m SCY CN201 Peripheral Interface Unit High density I O 12 16 point I O Special I O Unit C200H IP006 Connecting Cable To connect GPC to Peripheral Interface Unit 2 m 3G2A2 CN221 5 m C500 CN523 10 m C500 CN131 20 m C500 CN231 30 m C500 CN331 40 m C500 CN431 5...

Page 288: ... SYSMAC LINK Unit C200H TL001 F Adapter C1000H CE001 F Adapter Cover C1000H COV01 Communications C bl Coaxial cables Manufactured by Hitachi ECXF5C 2V Cable Manufactured by Fujigura 5C 2V Auxiliary Power Sup ply Unit For use with the C200H SLK11 C200H APS03 SYSMAC NET Link Unit Must be mounted to leftmost 2 slots on Rack with C200H CPU11 E C200HS SNT32 Power Supply Ad t Required when supplying pow...

Page 289: ...ording to the function code A PC instruction is entered either using the appropriate Programming Console key s e g LD AND OR NOT or by using function codes To input an instruction using its function code press FUN the function code and then WRITE Function Code Name Mnemonic Page AND AND 102 AND LOAD AND LD 103 AND NOT AND NOT 102 COUNTER CNT 118 LOAD LD 102 LOAD NOT LD NOT 102 OR OR 102 OR LOAD OR...

Page 290: ... 163 39 DECREMENT DEC 163 40 SET CARRY STC 163 41 CLEAR CARRY CLC 164 46 DISPLAY MESSAGE MSG 204 47 LONG MESSAGE LMSG 205 48 TERMINAL MODE TERM 206 49 SET SYSTEM SYS 206 50 BINARY ADD ADB 179 51 BINARY SUBTRACT SBB 181 52 BINARY MULTIPLY MLB 183 53 BINARY DIVIDE DVB 184 54 DOUBLE BCD ADD ADDL 165 55 DOUBLE BCD SUBTRACT SUBL 169 56 DOUBLE BCD MULTIPLY MULL 172 57 DOUBLE BCD DIVIDE DIVL 173 58 DOUBL...

Page 291: ... 7 SEGMENT DECODER SDEC 158 79 FLOATING POINT DIVIDE FDIV 174 80 SINGLE WORD DISTRIBUTE DIST 138 81 DATA COLLECT COLL 138 82 MOVE BIT MOVB 139 83 MOVE DIGIT MOVD 140 84 REVERSIBLE SHIFT REGISTER SFTR 125 85 TABLE COMPARE TCMP 147 86 ASCII CONVERT ASC 161 89 INTERRUPT CONTROL INT 190 90 NETWORK SEND SEND 211 91 SUBROUTINE ENTER SBS 189 92 SUBROUTINE DEFINE SBN 188 93 RETURN RET 188 94 WATCHDOG TIME...

Page 292: ...for an instruction can also vary depending on the circumstances i e whether it is in an interlocked program section and the execution condition for IL is OFF whether it is between JMP 04 00 and JME 05 00 and the execution condition for JMP 04 00 is OFF or whether it is reset by an OFF execution condition R IL and JMP are used to indicate these three times All execution times are given in microseco...

Page 293: ...T 16 When shifting 1 word 170 3 When shifting 1 000 words using DM 8 6 ms RWS 17 When resetting 1 word 388 3 75 When shifting 999 words using DM 30 3 ms SCAN 18 Constant for SV 311 3 75 DM for SV 412 MCMP 19 Comparing 2 words result word 636 3 75 Comparing 2 DM result DM 890 CMP 20 When comparing a constant to a word 124 3 When comparing two DM 296 MOV 21 When transferring a constant to a word 88 ...

Page 294: ... 33 Word constant b word 724 3 75 DM DM b DM 984 ANDW 34 Constant AND word b word 122 3 75 DM AND DM b DM 371 ORW 35 Constant OR word b word 122 3 75 DM OR DM b DM 371 XORW 36 Constant XOR word b word 122 3 75 DM XOR DM b DM 371 XNRW 37 Constant XNOR word b word 124 3 75 DM XNOR DM b DM 373 INC 38 When incrementing a word 82 2 25 When incrementing DM 167 DEC 39 When decrementing a word 82 2 25 Whe...

Page 295: ...670 3 75 When transferring DM to DM 923 WTC 64 When transferring from a word to words 807 3 75 When transferring DM to DM 1 07 ms HTS 65 Word to word 859 3 75 DM to DM 1 00 ms STH 66 Word to word 744 3 75 DM to DM 889 BCNT 67 When counting 1 word 502 3 75 When counting 1 000 words using DM 100 ms BCMP 68 Comparing constant to word designated table 674 3 75 Comparing DM b DM designated table 926 VC...

Page 296: ...ST 80 Constant b word word 246 3 75 DM b DM DM 481 COLL 81 Word word b word 262 3 75 DM DM b DM 497 MOVB 82 When transferring word to a word 158 3 75 When transferring DM to DM 357 MOVD 83 When transferring word to a word 195 3 75 When transferring DM to DM 399 SFTR 84 When shifting 1 word 284 3 75 When shifting 1 000 DM words using DM 13 8 ms TCMP 85 Comparing constant to words in a designated ta...

Page 297: ... HR AR LR TC AND LOAD AND LD Logically ANDs the resultant execution conditions of the preceding logic blocks None AND NOT AND NOT B Logically ANDs the inverse of the desig nated bit with the current execution condi tion B IR SR HR AR LR TC COUNTER CNT CNT N SV CP R A decrementing counter SV 0 to 9999 CP count pulse R reset input The TC bit is entered as a constant N TC SV IR HR AR LR DM LOAD LD B ...

Page 298: ...ymbol OR LOAD OR LD Logically ORs the resultant execution con ditions of the preceding logic blocks None OR NOT OR NOT B Logically ORs the inverse of the desig nated bit with the execution condition B IR SR HR AR LR TC OUTPUT OUT B Turns ON B for an ON execution condition turns OFF B for an OFF execution condi tion B IR SR HR AR LR TR OUTPUT NOT OUT NOT B Turns OFF B for an ON execution condi tion...

Page 299: ...uctions between JMP 04 and the corresponding JME 05 are to be ignored or treated as NOP 00 For direct jumps the corre sponding JMP 04 and JME 05 instruc tions have the same N value in the range 01 through 99 Direct jumps are usable only once each per program i e N is 01 through 99 can be used only once each and the instructions between the JUMP and JUMP END instructions are ignored 00 may be used ...

Page 300: ... from the starting word St through to the ending word E I input bit P shift pulse R reset input St must be less than or equal to E St and E must be in the same data area E St 15 15 00 IN 00 St E IR HR AR LR KEEP KEEP 11 S KEEP 11 B R Defines a bit B as a latch controlled by the set S and reset R inputs B IR HR AR LR REVERSIBLE COUNTER CNTR 12 II DI R N SV CNTR 12 Increases or decreases the PV by o...

Page 301: ...ing The shift direction is determined by bit 13 OFF shifts the non zero data to higher addressed words ON to lower addressed words Bit 14 is the register enable bit ON for shift en abled Bit 15 is the reset bit if bit 15 is ON the register will be set to zero between St and E when the instruction is executed with bit 14 also ON St and E must be in the same data area C IR SR HR AR LR TC DM St E IR ...

Page 302: ... DM MOVE NOT MVN 22 MVN 22 S D Transfers the inverse of the data in the source word S to destination word D S IR SR HR AR LR TC DM D IR HR AR LR DM BCD TO BINARY BIN 23 BIN 23 S R Converts 4 digit BCD data in source word S into 16 bit binary data and outputs converted data to result word R S x100 x101 x102 x103 x160 x161 x162 x163 BCD BIN R S IR SR HR AR LR TC DM R IR HR AR LR DM BINARY TO BCD BCD...

Page 303: ...Wd IR HR AR LR DM ROTATE RIGHT ROR 28 ROR 28 Wd 15 00 CY Wd Each bit within a single word of data Wd is moved one bit to the right with bit 00 moving to carry CY and CY moving to bit 15 Wd IR HR AR LR DM COMPLEMENT COM 29 COM 29 Wd Inverts bit status of one word Wd of data changing 0s to 1s and vice versa Wd Wd Wd IR HR AR LR DM BCD ADD ADD 30 ADD 30 Au Ad R CY CY Adds two 4 digit BCD values Au an...

Page 304: ...ically ANDs two 16 bit input words I1 and I2 and sets the bits in the result word R if the corresponding bits in the input words are both ON I1 I2 IR SR HR AR LR TC DM R IR HR AR LR DM LOGICAL OR ORW 35 ORW 35 I1 I2 R Logically ORs two 16 bit input words I1 and I2 and sets the bits in the result word R when one or both of the corresponding bits in the input words is are ON I1 I2 IR SR HR AR LR TC ...

Page 305: ...ds of ASCII code start ing from FM on the Programming Console or GPC All eight words must be in the same data area FM FM 7 C D A B D P ABCD DP FM IR HR AR LR TC DM LONG MESSAGE LMSG 47 CPU11 E LMSG 47 S D Outputs a 32 character message to either a Programming Console or a device con nected via the RS 232C interface The output message must be in ASCII begin ning at address S The destination of the ...

Page 306: ... bit 07 specifies whether I O status will be maintained on start up Bit 06 specifies whether the Force Status Hold Bit is set To be effective SYS 49 must be pro grammed at address 00001 with LD AR 1001 at address 00000 P Not used BINARY ADD ADB 50 ADB 50 Au Ad R Adds the 4 digit augend Au 4 digit ad dend Ad and content of CY and outputs the result to the specified result word R Ad Au CY R CY Au Ad...

Page 307: ...r and outputs result to the designated result words R and R 1 R and R 1 must be in the same data area D d Dr R R 1 Quotient Remainder Dd Dr IR SR HR AR LR TC DM R IR HR AR LR DOUBLE BCD ADD ADDL 54 ADDL 54 Au Ad R Adds two 8 digit values 2 words each and the content of CY and outputs the result to the specified result words All words for any one operand must be in the same data area Au 1 Ad 1 CY R...

Page 308: ...uts the re sult to the specified result words All words for any one operand must be in the same data area Md 1 Md Mr 1 Md R 3 R 2 R 1 R X Md Mr IR SR HR AR LR TC DM R IR HR AR LR DM DOUBLE BCD DIVIDE DIVL 57 DIVL 57 Dd Dr R Divides the 8 digit BCD dividend by an 8 digit BCD divisor and outputs the result to the specified result words All words for any one operand must be in the same data area Dd 1...

Page 309: ...th words for any one operand must be in the same data area S S 1 R R 1 S IR SR HR AR LR DM R IR HR AR LR DM DOUBLE COMPARE CMPL 60 CPU11 E CMPL 60 S1 S2 Compares the 8 digit hexadecimal values in words S1 1 and S1 with the values in S2 1 and S2 and indicates the result using the Greater Than Less Than and Equal Flags in the AR area S1 1 and S2 1 are regarded as the most significant data in each pa...

Page 310: ...S S IR SR HR AR LR TC DM D IR SR HR AR LR TC DM C IR SR HR AR LR TC DM HOURS TO SECONDS HTS 65 CPU11 E HTS 65 S R Converts a time given in hours minutes seconds S and S 1 to an equivalent time in seconds only R and R 1 S and S 1 must be BCD and within one data area R and R 1 must also be within one data area S IR SR HR AR LR TC DM R IR SR HR AR LR TC DM Not used SECONDS TO HOURS STH 66 CPU11 E STH...

Page 311: ...ost two digits for word numbers Data Areas Name Mnemonic Operand Data Areas Function Symbol BLOCK COMPARE BCMP 68 BCMP 68 S CB R Compares a 1 word binary value S with the 16 ranges given in the comparison table CB is the starting word of the com parison block If the value falls within any of the ranges the corresponding bits in the result word R will be set The comparison block must be within one ...

Page 312: ... S gives the address of the value of the x coordinate The calculated data is transferred to the destination word D Sine and cosine results are given in BCD Line graph coordinate calculations inter polation can be in BCD or BIN The data in the control word C deter mines which operation is performed If C is entered as a constant with a value of 0000 or 0001 the sine or cosine respectively of the sou...

Page 313: ... in the same data area as must all destination words Transfers can be within one data area or between two data areas but the source and destination words must not overlap S S 1 D D 1 S N 1 D N 1 No of Words N IR SR HR AR LR TC DM S IR HR AR LR TC DM D IR SR HR AR LR TC DM BLOCK SET BSET 71 BSET 71 S St E Copies the content of one word or constant S to several consecutive words from the starting wo...

Page 314: ...ord St and E must be in the same data area E E 1 St E IR HR AR LR DM 4 TO 16 DECODER MLPX 76 MLPX 76 S Di R Converts up to four hexadecimal digits in the source word S into decimal values from 0 to 15 and turns ON the correspond ing bit s in the result word s R There is one result word for each converted digit Digits to be converted are designated by Di The rightmost digit specifies the first digi...

Page 315: ...ives the number of digits to be converted minus 1 If the next digit is 1 the first con verted data is transferred to left half of the first destination word If it is 0 the transfer is to the right half S D 0 to F S IR SR HR AR LR TC DM Di IR HR AR LR TC DM D IR HR AR LR DM FLOATING POINT DIVIDE FDIV 79 FDIV 79 Dd Dr R Divides one floating point value by another and outputs a floating point result ...

Page 316: ...AR LR TC DM D IR HR AR LR TC DM MOVE BIT MOVB 82 MOVB 82 S Bi D Transfers the designated bit of the source word or constant S to the designated bit of the destination word D The rightmost two digits of the bit designator Bi specify the source bit The two leftmost digits specify the destination bit S D S IR SR HR AR LR DM Bi IR HR AR LR TC DM D IR HR AR LR DM MOVE DIGIT MOVD 83 MOVD 83 S Di D Moves...

Page 317: ...ght 1 shift left Bit 13 is the value shifted into the source data with the bit at the opposite end being moved to CY Bit 14 1 shift en abled 0 shift disabled If bit 15 is ON when SFTR 89 is executed with an ON condition the entire shift register and CY will be set to zero St and E must be in the same data area and St must be less than or equal to E CY E St 15 00 CY E IN St IN 00 11 12 13 14 15 Not...

Page 318: ... PC can have up to 4 IIUs N de fines the source of the interrupt 000 to 003 designate the no of the IIU 004 desig nates a scheduled interrupt In IIUs bits 00 to 07 identify the interrupting subroutine higher bits are not used Bit 00 of Unit 0 cor responds to interrupt subroutine 00 through to bit 07 of Unit 3 which corre sponds to subroutine 31 CC is the control code the meaning of which depends o...

Page 319: ... half of word C 2 specifies the destination port 00 NSB 01 02 NSU and the right half specifies the destination node number If the destination node number is set to 0 data is transmitted to all nodes For SYSMAC LINK Systems the right half of C 1 specifies the response monitoring time default 00 2 s FF monitoring dis abled the next digit to the left gives the maximum number of re transmissions 0 to ...

Page 320: ...ol SUBROUTINE START SBN 92 SBN 92 N Marks the start of subroutine N N 00 to 99 RETURN RET 93 RET 93 Marks the end of a subroutine and returns control to the main program None WATCHDOG TIMER REFRESH WDT 94 WDT 94 T Sets the maximum and minimum limits for the watchdog timer normally 0 to 130 ms New limits Maximum time 130 100 x T Minimum time 130 100 x T 1 T 0 to 63 I O REFRESH IORF 97 IORF 97 St E ...

Page 321: ...he control words va ries depending on the type of system In both types of systems the first control word C gives the number of words to be transferred For NET Link Systems in the second word C 1 bit 14 specifies the system 0 for system 1 and 1 for system 0 and the rightmost 7 bits define the network num ber The left half of word C 2 specifies the source port 00 NSB 01 02 NSU and the right half spe...

Page 322: ...ree levels in H type PCs 76 Error Message Read Displays error messages in sequence starting with the most severe messages 264 Bit Word Monitor Displays the specified address whose operand is to be monitored In RUN or MONTR mode it will show the status of the operand for any bit or word in any data area 238 3 word Monitor Simultaneously monitors three consecutive words 246 Forced Set Reset Set Used...

Page 323: ...ar EPROM memory the write enable switch must be ON i e enabled The branch lines shown are used only when per forming a partial memory clear with each of the memory areas entered being retained Specifying an ad dress will result in the Program Memory after and including that ad dress being deleted All memory up to that address will be retained P CLR PLAY SET NOT REC RESET MONTR HR CNT DM Address Pa...

Page 324: ...gram memory either RAM or EPROM This allows the user pro gram and the Data Link Table to be written to EPROM together for the CPU11 E only When power is applied to a PC with Data Link Tables stored in program memory the table will automatically overwrite the CPU Data Link Table Changes made to the table do not affect the copy in pro gram memory To update the copy in program memory the transfer ope...

Page 325: ...Address displayed Instruction word Operand Program Read Allows the user to scroll through the program address by address If the Program Memory is read in RUN or MONITOR mode the ON OFF status of each displayed bit is also shown R P M Address currently displayed Program Search Allows the program to be searched for occurrences of any designated in struction or data area address To designate a bit ad...

Page 326: ...isplayed Enter new instruction Insert Delete Program Check Once a program has been entered it should be checked for errors This program check can be used to search for three levels of syntax errors De tails of the errors covered by each level are given in the relevant manu als The address where the error was generated will also be displayed P CLR SRCH A 0 B 1 C 2 SRCH SRCH CLR Press SRCH to find n...

Page 327: ...T to display the data contents of the specified word and the two words that follow Pressing CLR will change the three word monitor operation into a single word display R P M EXT Bit Word monitor in progress Currently monitored words ap pear on the left of the screen Forced Set Reset If a bit timer or counter address is leftmost on the screen during a Bit Word Monitor operation pressing PLAY SET wi...

Page 328: ...ry changes result if 1 or 0 is entered Permanent changes are made by pressing SHIFT and SET or SHIFT and RESET The for mer will result in an S being displayed in that bit position Similarly SHIFT and RESET will produce an R in the display During operation of the PC the bits having 1 or 0 values will change ac cording to the program conditions Bits with S or R however will always be treated as a 1 ...

Page 329: ...while the program is being ex ecuted The cycle time displayed af ter pressing CLR and MONTR is that for the current cycle Pressing MONTR again will display a new cycle time Any difference between successive cycle times is due to the different execution conditions that exist during each cycle R M CLR MONTR MONTR Hex ASCII Display Change Converts 4 digit hexadecimal DM data to ASCII and vice versa R...

Page 330: ... P EXT A 0 WRITE CLR WRITE Start recording with the tape recorder SHIFT REC RESET File no Start address Stop address After about 5 seconds Cancel with the CLR key Program Memory Restore To read Program Memory data which has been recorded on a cassette tape the keystrokes are as given here The file number must be the same as the one entered when the data was recorded The read opera tion will procee...

Page 331: ...ove The exceptions are that start and stop addresses are not required and the DM area is specified instead of the Program Memory Each opera tion will continue through to the end of the tape unless cancelled by press ing CLR P EXT CLR File no VER B 1 Start tape recorder playback SHIFT SHIFT REC RESET PLAY SET Start tape recorder re cording 5 second leader tape Saving Restoring Comparing Modes in wh...

Page 332: ...Device The statuses of the flags will show the results of the most recently executed instruction With a differentiated instruction flag statuses will be changed only in the first scan when the execution condition of the instruction is satisfied during all other scans the differentiated instruction will not affect the statuses of the flags deter mined by the previous instruction i e until the execu...

Page 333: ...46 Unaffected Unaffected Unaffected Unaffected LMSG 47 TERM 48 Unaffected Unaffected Unaffected Unaffected Unaffected SYS 49 ADB 50 Unaffected Unaffected SBB 51 MLB 52 Unaffected Unaffected Unaffected DVB 53 ADDL 54 Unaffected Unaffected SUBL 55 MULL 56 Unaffected Unaffected Unaffected DIVL 57 BINL 58 BCDL 59 CMPL 60 Unaffected CTW 63 Unaffected Unaffected Unaffected WTC 64 HTS 65 STH 66 BCNT 67 B...

Page 334: ...SRD 75 MLPX 76 DMPX 77 SDEC 78 FDIV 79 DIST 80 COLL 81 MOVB 82 MOVD 83 SFTR 84 Unaffected Unaffected Unaffected TCMP 85 Unaffected Unaffected Unaffected ASC 86 Unaffected Unaffected Unaffected Unaffected INT 89 SEND 90 SBS 91 SBN 92 Unaffected Unaffected Unaffected Unaffected Unaffected RET 93 WDT 94 BPRG 96 IORF 97 RECV 98 Unaffected Unaffected Unaffected Unaffected ...

Page 335: ...715 AR 00 to AR 27 AR bits are mostly dedicated for specific purposes Un used AR bits may be used as works bits See tables of dedicated bits following this table LR LR 0000 to LR 6315 LR 00 to LR 63 LR bits are used for data exchange in PC Link Systems When the PC does not include a PC Link System LR bits may be used for SYSMAC LINK or SYSMAC NET Link Systems LR bits may be used as work bits when ...

Page 336: ...0 to 15 Data link status output area for operating level 1 of SYSMAC LINK or SYSMAC NET Link Sys tem 246 00 to 15 Not used 247 to 250 00 to 07 PC Link Unit Run Flags or data link status for operating level 1 08 to 15 PC Link Unit Error Flags or data link status for operating level 1 251 00 to 15 Remote I O Error Flags 252 00 SEND 90 RECV 98 Error Flag for operating level 0 of SYSMAC LINK SYSMAC NE...

Page 337: ...d for any other purpose Words and bits from AR 07 to AR 22 are available as work words and work bits if not used for the following assigned pur poses Word Use AR 07 Error History Area CPU11 E only AR 07 to 15 SYSMAC LINK Units AR 16 AR 17 SYSMAC LINK and SYSMAC NET Link Units AR 18 to AR 21 Calendar Clock Area CPU11 E only AR 07 AR 22 TERMINAL Mode Key Bits CPU11 E only AR Bit Allocations Word s B...

Page 338: ...15 00 to 15 Active Node Flags for SYSMAC LINK System nodes of operating level 1 16 00 to 15 SYSMAC LINK SYSMAC NET Link System operating level 0 service time per cycle 17 00 to 15 SYSMAC LINK SYSMAC NET Link System operating level 1 service time per cycle 18 to 21 00 to 15 Calendar Clock Area CPU11 E only 22 00 to 15 TERMINAL Mode Key Bits CPU11 E only 23 00 to 15 Power OFF Counter 24 00 to 03 Not...

Page 339: ... Assignment Recording Sheets This appendix contains sheets that can be copied by the programmer to record I O bit allocations and terminal assignments as well as details of work bits data storage areas timers and counters ...

Page 340: ...5 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 I O Bits ...

Page 341: ...03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Work Bits ...

Page 342: ...336 Programmer Program Date Page Word Contents Notes Word Contents Notes Data Storage ...

Page 343: ...337 Programmer Program Date Page TC address T or C Set value Notes TC address T or C Set value Notes Timers and Counters ...

Page 344: ... designed for flexibility al lowing the user to input all required addresses and instructions When coding programs be sure to specify all function codes for instructions and data areas or for constant for operands These will be necessary when inputting programs though a Programming Console or other Pe ripheral Device ...

Page 345: ...340 Programmer Program Date Page Address Instruction Operand s Address Instruction Operand s Address Instruction Operand s Program Coding Sheet ...

Page 346: ...1 00010001 0B 00001011 12 00010010 0C 00001100 13 00010011 0D 00001101 14 00010100 0E 00001110 15 00010101 0F 00001111 16 00010110 10 00010000 17 00010111 11 00010001 18 00011000 12 00010010 19 00011001 13 00010011 20 00100000 14 00010100 21 00100001 15 00010101 22 00100010 16 00010110 23 00100011 17 00010111 24 00100100 18 00011000 25 00100101 19 00011001 26 00100110 1A 00011010 27 00100111 1B 00...

Page 347: ... 1 SOH DC1 1 A Q a q 1 A Q a q 0010 2 STX DC2 2 B R b r 2 B R b r 0011 3 ETX DC3 3 C S c s 3 C S c s 0100 4 EOT DC4 4 D T d t 4 D T d t 0101 5 ENQ NAK 5 E U e u 5 E U e u 0110 6 ACK SYN 6 F V f v 6 F V f v 0111 7 BEL ETB 7 G W g w 7 G W g w 1000 8 BS CAN 8 H X h x 8 H X h x 1001 9 HT EM 9 I Y i y 9 I Y i y 1010 A LF SUB J Z j z J Z j z 1011 B VT ESC K k K k 1100 C FF FS L l L l 1101 D CR GS Ć M m ...

Page 348: ...telligent I O Unit used to program in BASIC When connected to an NSU on a Net Link System commands can be sent to other nodes Backplane A base onto which Units are mounted to form a Rack Backplanes provide a series of connectors for these Units along with wiring to connect them to the CPU Backplanes also provide connectors used to connect them to other Backplanes In some Systems different Backplan...

Page 349: ...hold a carry from an addition or multiplication operation or to indicate that the result is negative in a sub traction operation The carry flag is also used with certain types of shift oper ations clock pulse A pulse available at a certain bit in memory for use in timing operations Vari ous clock pulses are available with different pulse widths clock pulse bit A bit in memory that supplies a pulse...

Page 350: ...at the receiver is ready to accept incoming data cycle The process used to execute a ladder diagram program The program is ex amined sequentially from start to finish and each instruction is executed in turn based on execution conditions cycle time The time required for a single cycle of the ladder diagram program data area An area in the PC s memory that is designed to hold a specific type of dat...

Page 351: ...iate Down instruction digit A unit of storage in memory that consists of four bits digit designator An operand that is used to designate the digit or digits of a word to be used by an instruction distributed control An automation concept in which control of each portion of an automated sys tem is located near the devices actually being controlled i e control is de centralized and distributed over ...

Page 352: ...ual instructions Factory Intelligent Terminal A programming device provided with advanced programming and debugging capabilities to facilitate PC operation The Factory Intelligent Terminal also provides various interfaces for external devices such as floppy disk drives fatal error An error that stops PC operation and requires correction before operation can continue FIT Abbreviation for Factory In...

Page 353: ... from a PC in a Host Link System The host computer is used for data management and overall system control Host computers are generally personal or business comput ers HR area A data area used to store and manipulate data and to preserve data when power to the PC is turned OFF increment Increasing a numeric value indirect address An address whose contents indicates another address The contents of t...

Page 354: ...or speed of the data interlock A programming method used to treat a number of instructions as a group so that the entire group can be reset together when individual execution is not required An interlocked program section is executed normally for an ON ex ecution condition and partially reset for an OFF execution condition interrupt signal A signal that stops normal program execution and causes a ...

Page 355: ...of outputs that are to be set out of the system Bits and words in the IR that are used this way are called I O bits and I O words The remaining bits in the IR area are work bits JIS Acronym for Japanese Industrial Standards jump A type of programming where execution moves directly from one point in a program to another without sequentially executing any instructions inbe tween Jumps are usually co...

Page 356: ...ns in a loop arrangement Each node can be any one of a number of devices which can transfer data to and from each other logic block A group of instructions that is logically related in a ladder diagram program and that requires logic block instructions to relate it to other instructions or logic blocks logic block instruction An instruction used to locally combine the execution condition resulting...

Page 357: ...ass data back and forth receive commands from any interfaced computer and share any interfaced peripheral device Net Link Unit The Unit used to connect PCs to a Net Link System The full name is SYS MAC Net Link Unit Network Service Board A device with an interface to connect devices other than PCs to a Net Link System Network Service Unit A Unit that provides two interfaces to connect peripheral d...

Page 358: ...that is turned ON or OFF for a specified interval of time which is longer than one cycle on line removal Removing a Rack mounted Unit for replacement or maintenance during PC operation operand Bit s or word s designated as the data to be used for an instruction An op erand can be input as a constant expressing the actual numeric value to be used or as an address to express the location in memory o...

Page 359: ...configuration The arrangement and interconnections of the Units that are put together to form a functional PC PCF Acronym for plastic clad optical fiber cable PC Link System A system in which PCs are connected through PC Link Units to enable them to share common data areas i e each of the PCs writes to certain words in the LR area and receives the data of the words written by all other PC Link Uni...

Page 360: ...he program as opposed to one generated by the system Programming Console The simplest form or programming device available for a PC Programming Consoles are available both as hand held models and as CPU mounting models Programming Device A peripheral device used to input a program into a PC or to alter or monitor a program already held in the PC There are dedicated programming devices such as Prog...

Page 361: ...depending on the specified conditions reversible shift register A shift register that can shift data in either direction depending on the speci fied conditions right hand instruction Another term for terminal instruction rightmost bit word The lowest numbered bits of a group of bits generally of an entire word or the lowest numbered words of a group of words These bits words are often called least...

Page 362: ... data is taken for use in an instruction as opposed to the location to which the result of an instruction is to be written The latter is called the destination Special I O Unit A dedicated Unit that is designed for a specific purpose Special I O Units include Position Control Units High Speed Counter Units Analog I O Units etc SR area A data area in a PC used mainly for flags control bits and othe...

Page 363: ... to store the results of a trace transmission distance The distance that a signal can be transmitted TR area A data area used to store execution conditions so that they can be reloaded later for use with other instructions trace An operation whereby the program is executed and the resulting data is stored in TM memory to enable step by step analysis and debugging transfer The process of moving dat...

Page 364: ...ored A word address must specify sometimes by default the data area and the number of the word that is being addressed word multiplier A value between 0 and 3 that is assigned to a Master in a Remote I O Sys tem so that words can be allocated to non Rack mounting Units within the System The word setting made on the Unit is added to 32 times the word multiplier to arrive at the actual word to be al...

Page 365: ...tion 3 controlled system definition 3 counters bits in TC area 40 changing SV 251 conditions when reset 118 122 creating extended timers 120 extended 119 inputting SV 74 Power OFF 36 reversible counters 121 CPU device mounted flag 37 operational flow 220 221 CPU indicators 12 CPU Rack definition 12 cycle First Cycle flag 30 cycle time 220 226 calculating 226 228 controlling 203 CPU01 E 03 E 221 CP...

Page 366: ...31 programming example 143 145 CPU mounting Device 37 CY clearing 164 setting 163 Cycle Time Error 30 definition 16 First Cycle 30 I O Verification Error 30 Instruction Execution Error 31 Link Units 37 Low Battery 30 Low Battery CPU11 E 37 Network Parameter 37 Optical Transmitting I O Error 33 Step 31 floating point decimal division 174 Floppy Disk Interface Unit See peripheral devices forced set ...

Page 367: ...144 LD 47 102 LD NOT 47 102 LMSG 47 205 MCMP 19 141 MLB 52 183 MLPX 76 153 MOV 21 132 MOVB 82 139 MOVD 83 140 MSG 46 204 MUL 32 171 MULL 56 172 MVN 22 133 NOP 00 112 NOT 45 operands 44 OR 48 103 combining with AND 49 OR LD 52 103 combining with AND LD 54 use in logic blocks 53 OR NOT 48 103 ORW 35 185 OUT 50 104 OUT NOT 50 104 RECV 98 213 RET 93 188 ROL 27 128 ROOT 72 177 ROR 28 128 RWS 17 131 SBB...

Page 368: ...inition 15 memory partial clear 64 messages programming 204 205 mnemonic code converting 46 58 modifying data hex binary 244 monitoring binary 248 monitoring 3 words 246 mounting Units location 13 N nesting subroutines 189 NET Link System LR area application See SYSMAC NET Link System non fatal operating errors 265 normally closed condition definition 45 NOT definition 45 O operand bit 46 operands...

Page 369: ...ns self maintaining bits using KEEP 11 107 set value See SV seven segment displays converting data 158 shift registers 123 132 controlling individual bits 124 Special I O Units See Units SR area 20 31 status indicators See CPU indicators step execution Step flag 31 step instructions 193 202 subroutine number 188 subroutines 187 192 SV accessing via TC area 41 changing 251 CNTR 12 122 timers and co...

Page 370: ... with CNT 002 and 00200 replaced with 00201 in fourth branch of first dia gram Page 148 In SBS 91 nesting can be performed up to 16 levels Pages 189 90 SEND 90 added to instruction execution times table and OFF times for instructions 47 through 49 have been corrected Sec 6 3 FAL 06 divided into 00 and 01 to 99 Page 309 Word 19 corrected to 255 in table heading 3A September 1992 Page 33 Reset bit A...

Page 371: ... 370 Revision code Date Revised content 05 June 2003 Page xiv Precautions added Pages 21 28 and 330 Data Retention Control Bit unified to I O Status Hold Bit Pages 28 and 29 Section added on operation without a battery ...

Page 372: ...eadquarters OMRON EUROPE B V Wegalaan 67 69 NL 2132 JD Hoofddorp The Netherlands Tel 31 2356 81 300 Fax 31 2356 81 388 OMRON ELECTRONICS LLC 1 East Commerce Drive Schaumburg IL 60173 U S A Tel 1 847 843 7900 Fax 1 847 843 8568 OMRON ASIA PACIFIC PTE LTD 83 Clemenceau Avenue 11 01 UE Square Singapore 239920 Tel 65 6835 3011 Fax 65 6835 2711 ...

Page 373: ...Cat No W130 E1 05 Note Specifications subject to change without notice 0666362 6A Printed in Japan Authorized Distributor ...

Page 374: ...Cat No W130 E1 05 C200H Programmable Controllers CPU01 E 03 E 11 E OPERATION MANUAL ...

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