Octagon PC-500, User Manual

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5-4
Serial ports PC-500 user’s manual
Table 5-5 Register 0A9h
Bit Description
7 Enhanced mode jumper (W2[3-4])
6 Not used
5 I/O range select A (ISP file dependent)
4 I/O range select B (ISP file dependent)
3 User option jumper B (W4[5-6])
2 User option jumper A (W3[9-10])
1 Not used
0 USESETUP jumper (W2[9-10])
* = I/O range select A and B can be adjusted via the ISP
files found on the PC-500 utility disk. See the IRQ
routing and opto irqs chapter for more information.
2. Determine the interrupt status port address based on bit 5 (I/O range
select A) and bit 4 (I/O range select B) at register 0A9h. See Table 5-6.
Table 5-6 Reading the interrupt status port: Register 0A9h
I/O range select
A (bit 5) B (bit 4)
COM5
addresses EZ I/O
addresses Interrupt status
port addresses
0 0 140-147h 150-157h 158-15Fh
0 1 120-127h 130-137h 138-13Fh
1 0 340-347h 350-357h 358-35Fh
1* 1* 320-327h* 330-337h* 338-33Fh*
* = default
For example, if bits 5 and 4 are both 0, the interrupt status port ad-
dresses are 158-15Fh. If bit 5 is 0 and bit 4 is 1, the interrupt status
port addresses are 138-13Fh; if bit 5 is 1 and bit 4 is 0, the interrupt
status port addresses are 358-35Fh; and if bits 4 and 5 are both 1, the
interrupt status port addresses are 338-33Fh.
3. Inside your interrupt handler, read the interrupt status port. Bit 1
through bit 3 show which serial port caused the interrupt.
For example, when there is a 1 in bit 3, this means COM3 caused the
interrupt; a 1 in bit 2 shows that the interrupt came from COM4; a 1 in
bit 1 means that COM5 caused the interrupt; and by default, when a 1
is in bit 0, then COM5 caused the interrupt. See Table 5-6.
Note Exit the interrupt handler only when bits 0 through 3 are all at 0.