Octagon PC-500, User Manual

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22-3
PC-500 user’s manual CPU power management
Before a device is SUSPENDed, or powered down, its context is saved in
memory so that it can be restored to its active state when it is powered
up. The timer is disabled on SUSPEND to prevent repetitive triggering,
and the chipset is configured to generate another SMI when the device
is accessed again. That SMI allows the firmware to restore power to the
device and restore its context.
After the device power is restored by a triggering event, such as a
keyboard stroke, the access SMI is disabled and the timer is restarted.
This cycle may then be repeated. The status of each device is main-
tained to ensure that a powered-down device is not accessed for power-
down repeatedly.
Devices other than the disks and serial ports are not monitored for
activity, but can be individually powered down in reduced power states
at the system level.
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System power management
At the system level, power management is very similar to the device
level management, with a couple of exceptions. Cooperative manage-
ment is supported, allowing an APM driver, such as POWER.EXE, to
control the actual power state transitions. This is done by identifying
power management events and reporting them to the APM driver via a
polling mechanism. Power state transitions then occur at the request of
the APM driver. Individual device states in the various system power
states can be configured via CMOS locations to the extent at which the
firmware has the ability to control them. For example, the video can
remain ON during STANDBY, which makes STANDBY mode more
transparent to the user, or it can be powered OFF during STANDBY to
further reduce power. The parallel port may be powered OFF in
STANDBY, or remain ON in STANDBY and powered OFF in SUS-
PEND, but on return to full speed it must be powered ON because there
is no access SMI available. The disks and serial ports, on the other
hand, may remain powered OFF after the system RESUMEs and can be
powered ON when accessed.
The IDLE timer can be reset by numerous sources, including device
accesses and interrupts. Note that it is possible for the IDLE timer
configuration to be of shorter duration than the device timers. This
means that the system can be deemed IDLE even though some of the
devices are still active. When this occurs, the device power states are
set according to their configuration in CMOS.
Note that the APM interface prevents the system from entering
STANDBY or SUSPEND modes directly. These modes will be entered,
but that will occur through the APM interface (INT 15h) at the request
of the APM driver.
SUSPEND mode is the lowest power state that the system can attain
while still powered. The CPU clock is stopped and all controllable
devices are powered down. Because the devices are powered down and
the CPU is not running, only an external event can cause the system to