NXP Semiconductors MC92602, User Manual, Page: 36 / 48

Connector Signals
MC92602 Reduced Interface SerDes Design Verification Board User’s Guide, Rev. 3
A-4 Freescale Semiconductor
A.2 Output: 2
×
20 (0.100") Connectors
The MC92602 receiver parallel data outputs are connected to 2
×
20, 0.100" connectors. A mapping of
these signals are contained in Table A-6 .
Table A-6 lists the signals for the A_RECV–D_RECV (LA1–LA4, respectively) connectors. Note that the
receive data clock, RECV_ x _RCLK, is brought out to two connector pins. Care should be exercised when
connecting to both these pins not to exceed the drive capacity of the chip output. Refer to the MC92602
Quad 1.25 Gbaud Reduced Interface SerDes Reference Guide , for more details.
Table A-6. A_RECV and B_RECV Connectors
Connector
Pin No.
MC92602 Ball No.
Output Signal
Name
Description
A_RECV,
(Channel A)
B_RECV,
(Channel B)
C_RECV,
(Channel C)
D_RECV,
(Channel D)
1 N/C N/C N/C N/C — —
3 M2 K1 F1 C2 RECV_ x _CLK XCVR_ x , receive data clock
5 N/C N/C N/C N/C — —
7 M2 K1 F1 C2 RECV_ x _CLK XCVR_ x , receive data clock
9 N/C N/C N/C N/C GND Ground connection
11 N/C N/C N/C N/C GND Ground connection
13 N/C P10 N/C N/C For channels A, C, and D, this pin is ground.
For channel B, this pin is TDO (JTAG, test data
out)
15 P1 H2 G2 A1 RECV_ x _ERR Receiver x , error detect
17 N/C N/C N/C N/C GND Ground connection
19 N/C N/C N/C N/C GND Ground connection
21 N2 J1 G1 B2 RECV_ x _K Receiver x, special character
(status)
23 N/C N/C N/C N/C GND Ground connection
25 N/C N/C N/C N/C GND Ground connection
27 N/C N/C N/C N/C GND Ground connection
29 N/C N/C N/C N/C GND Ground connection
31 N1 J2 F2 B1 RECV_ x _3 Receiver x , data bit 3
33 M1 H3 E1 C1 RECV_ x _2 Receiver x , data bit 2
35 L2 K2 E3 D2 RECV_ x _1 Receiver x , data bit 1
37 L1 J3 E2 D1 RECV_ x _0 Receiver x , data bit 0
39 N/C N/C N/C N/C — —