NXP Semiconductors MC92602, User Manual, Page: 27 / 48

MC92602 Reduced Interface SerDes Design Verification Board User’s Guide, Rev. 3
Freescale Semiconductor 4-1
Chapter 4
Test Setups
This chapter outlines the laboratory test equipment setup and procedure to evaluate the features of the
MC92602 in more depth than those outlined in the previous chapter. These setups are meant to be
guidelines only and are not implied to be complete. Details of testing in specific system applications are
left to the user.
4.1 Serial Link Verification Using a Serial Bit Error Rate Tester
(BERT)
This test setup is used to observe the rate at which the MC92602 produces errors given either
pseudo-random (PRBS) patterns or user-defined pattern sets generated by the serial bit error rate tester
(BERT). The MC92602 is placed in repeater mode, REPE = high, thereby disabling the parallel receiver
and transmitter buses. Testing performed using the ten-bit interface mode does not require the insertion of
idle characters for word recognition or byte alignment. If verification using the 8B/10B encoder or other
MC92602 features is required, then appropriate idle insertion and timing requirements as outlined in the
MC92602 Quad 1.25 Gbaud Reduced Interface SerDes Reference Guide , must be followed.