84
RSP Coprocessor 0
The three fields of this register are used to encode arbitrary transfers of
rectangular areas of DRAM to/from contiguous I/DMEM.
length
is the
number of bytes per line to transfer,
count
is the number of lines, and
skip
is
the line stride, or skip value between lines. This is illustrated in Figure 4-1:
Figure 4-1
DMA Transfer Length Encoding
Note:
DMA
length
and line
count
are encoded as
(value - 1)
, that is a line
count
of 0 means 1 line, a byte
length
of 7 means 8 bytes, etc.
A straightforward linear transfer will have a count of 0 and skip of 0,
transferring (
1)
bytes.
The amount of data transferred must be a multiple of 8 bytes (64 bits), hence
the lower three bits of
length
are ignored and assumed to be all 1’s.
DMA transfer begins when the length register is written.
For more information about DMA transfers, see section “DMA” on page 96.
On power-up, these registers are 0x0.
count
skip
length
length = 7
skip = 8
count = 10
DRAM
DMEM
Summary of Contents for Ultra64
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