NEC V850E/MA1, Application Note

Page: 75 / 99

CHAPTER 5 APPLICATION EXAMPLES
Application Note U17121EJ1V1AN
75
V850EME2_REGW(PHBMR_SYSTEM_MEM_RANGE) = RANGE_SDRAM;
// SYSTEM_MEM_RANGE register
// Set range of PCI bus memory space in which main
// memory (SDRAM) is mapped to 3FFFFFFH (64 MB).
V850EME2_REGW(PHBMR_SDRAM_CTL) = 0x00071211;
// SDRAM_CTL register
// bit 23-16: CYCLE_LATENCY = 07H
// (Set latency for successive main memory
// (SDRAM) access from PCI device to 210 ns)
// bit 12: BUS_SIZE = 1B
// (Set bit width of data bus to 32 bits)
// bit 09-08: CAS_LATENCY = 10B (Set CAS latency to 2)
// bit 05-04: WAIT_STATE = 01B
// (Set wait interval of ACT
→ CMD, PRE → ACT,
// and CMD → ACT to 1 clock)
// bit 01-00: COLUMN_SIZE = 01B
// (Set bit width of column address to 9 bits)
V850EME2_REGW(PHBMR_PCI_CONTROL) = 0x07000717;
// bit 31-24: PCI_PARKCNT = 1
// (Set time for shifting to bus parking to 7)
// bit 15-08: PCI_REQ = 1 (Enable I_REQ_B0)
// bit 4: PCI_RESET bit = 1 (Release PCI bus reset)
// bit 1: PCI_MEM_EN bit = 1
// (Enable access from CPU to PCI memory area)
// bit 0: PCI_IO_EN bit = 1
// (Enable access from CPU to PCI I/O area)
return;
}
/////////////////////////////////////////////////////////////////
// Function name: main //
// Function: Initializes PCI Host Bridge Macro. //
// Argument: None //
// Return value: 0: Normal end //
/////////////////////////////////////////////////////////////////
int main(void)
{
// Initializes PCI Host Bridge Macro.
PCI_HBM_Init();
return 0;
}