CHAPTER 14 MULTIPLIER
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User’s Manual U15331EJ4V1UD
Figure 14-1. Block Diagram of Multiplier
Internal bus
Selector
Counter value
3
CPU clock
Start
Clear
Counter output
16-bit
adder
16-bit multiplication result
storage register 0 (Master) (MUL0)
16-bit multiplication result
storage register 0 (Slave)
Multiplication data
register A (MRA0)
Multiplication data
register B (MRB0)
Internal bus
3-bit counter
MULST0
Reset
Multiplier control
register 0 (MULC0)