User’s Manual U15331EJ4V1UD
17
LIST OF FIGURES (1/6)
Figure No.
Title
Page
2-1 I/O
Circuit Types ..........................................................................................................................................46
3-1
Memory Map (
µ
PD789488)..........................................................................................................................48
3-2
Memory Map (
µ
PD78F9488)........................................................................................................................49
3-3
Memory Map (
µ
PD789489)..........................................................................................................................50
3-4
Memory Map (
µ
PD78F9489)........................................................................................................................51
3-5
Data Memory Addressing (
µ
PD789488) ......................................................................................................54
3-6
Data Memory Addressing (
µ
PD78F9488) ....................................................................................................55
3-7
Data Memory Addressing (
µ
PD789489) ......................................................................................................56
3-8
Data Memory Addressing (
µ
PD78F9489) ....................................................................................................57
3-9
Program Counter Configuration ...................................................................................................................58
3-10
Program Status Word Configuration ............................................................................................................58
3-11
Stack Pointer Configuration .........................................................................................................................60
3-12
Data to Be Saved to Stack Memory .............................................................................................................60
3-13
Data to Be Restored from Stack Memory.....................................................................................................60
3-14
General-Purpose Register Configuration .....................................................................................................61
4-1
Port Types....................................................................................................................................................75
4-2
Block Diagram of P00 to P07 .......................................................................................................................77
4-3
Block Diagram of P10 and P11 ....................................................................................................................78
4-4
Block Diagram of P20 ..................................................................................................................................79
4-5
Block Diagram of P21 ..................................................................................................................................80
4-6
Block Diagram of P22 and P25 ....................................................................................................................81
4-7
Block Diagram of P23 ..................................................................................................................................82
4-8
Block Diagram of P24 ..................................................................................................................................83
4-9
Block Diagram of P30 to P33 .......................................................................................................................84
4-10
Block Diagram of P34 ..................................................................................................................................85
4-11
Block Diagram of P50 to P53 .......................................................................................................................86
4-12
Block Diagram of P60 to P67 .......................................................................................................................87
4-13
Block Diagram of P70 to P73 .......................................................................................................................89
4-14
Block Diagram of P80 to P87 .......................................................................................................................90
4-15
Port Mode Register Format..........................................................................................................................91
4-16
Format of Pull-Up Resistor Option Registers ...............................................................................................93
4-17 Port
Function
Register Format .....................................................................................................................93
5-1
Clock Generator Block Diagram (
µ
PD789488, 789489)...............................................................................96
5-2
Clock Generator Block Diagram (
µ
PD78F9488, 78F9489) ..........................................................................97
5-3
Format of Processor Clock Control Register................................................................................................98
5-4
Format of Subclock Oscillation Mode Register.............................................................................................99
