CHAPTER 2 PIN FUNCTIONS
User’s Manual U13850EJ4V0UM
55
(2) Non-port pins
(1/3)
Pin Name
I/O
PULL
Function
Alternate Function
A1
P110/WAIT
A2 to A4
P111 to P113
A5 to A8
P100/RTP0/KR0 to
P103/RTP3/KR3
A9
P104/RTP4/KR4/IERX
A10
P105/RTP5/KR5/IETX
A11, A12
P106/RTP6/KR6 to
P107/RTP7/KR7
A13
P34/TO0/SCK4
A14
P35/TO1
A15
Output
Yes
Lower address bus used for external memory expansion
P36/TI4/TO4
A16 to A21
Output
No
Higher address bus used for external memory expansion
P60 to P65
AD0 to AD7
P40 to P47
AD8 to AD15
I/O
No
16-bit multiplexed address/data bus used for external memory
expansion
P50 to P57
ADTRG
Input
Yes
A/D converter external trigger input
P05/INTP4
ANI0 to ANI7
Input
No
P70 to P77
ANI8 to ANI11
Input
No
Analog input to A/D converter
P80 to P83
ASCK0
P15/SCK1
ASCK1
Input
Yes
Serial clock input for UART0 and UART1
P25/SCK3
ASTB
Output
No
External address strobe signal output
P94
AV
DD
−
−
Positive power supply for A/D converter and alternate-function port
−
AV
REF
Input
−
Reference voltage input for A/D converter
−
AV
SS
−
−
Ground potential for A/D converter and alternate-function port
−
BV
DD
−
−
Positive power supply for bus interface and alternate-function port
−
BV
SS
−
−
Ground potential for bus interface and alternate-function port
−
CLKOUT
Output
−
Internal system clock output
−
DSTB
Output
No
External data strobe signal output
P93/RD
EV
DD
−
−
Power supply for I/O port and alternate-function pin (except for
bus interface)
−
EV
SS
−
−
Ground potential for I/O port and alternate-function pin (except
for bus interface)
−
HLDAK
Output
No
Bus hold acknowledge output
P95
HLDRQ
Input
No
Bus hold request input
P96
IERX
Input
IEBus data input (V850/SB2 only)
P104/RTP4/KR4/A9
IETX
Output
Yes
IEBus data output (V850/SB2 only)
P105/RTP5/KR5/A10
INTP0 to INTP3
External interrupt request input (analog noise elimination)
P01 to P04
INTP4
P05/ADTRG
INTP5
Input
Yes
External interrupt request input (digital noise elimination)
P06/RTPTRG
Remark
PULL: On-chip pull-up resistor