CHAPTER 12 DMA FUNCTIONS
User’s Manual U13850EJ4V0UM
362
(1) Correspondence between DRAn setting value and internal RAM area
(a) V850/SB1 (
µµµµ
PD703031A, 703031AY), V850/SB2 (
µµµµ
PD703034A, 703034AY)
Set the DRAn register to a value in the range of 0000H to 2FFFH (n = 0 to 5).
Setting is prohibited for values between 3000H and 3FFFH.
Figure 12-3. Correspondence Between DRAn Setting Value and Internal RAM (12 KB)
xxFFFFFFH
xxFFC000H
xxFFBFFFH
xxFFF000H
xxFFEFFFH
xxFF8000H
xxFF7FFFH
Access-prohibited
area
Expansion ROM area
Internal peripheral
I/O area
Internal RAM area
(DRAn setting value)
(2FFFH)
(0000H)
12 KB (usable for DMA)
Cautions 1. Do not set odd addresses for 16-bit transfer (DCHCn register DSn = 1).
2. While the increment function is being used (DCHCn register DDADn = 0), if the DRAn
register value is set to 2FFFH, it will be incremented to 3000H, and will thus become a
setting-prohibited value.
Remark
The DRAn register setting values are in the parentheses.