Chapter 2
NI 5450 Overview
©
National Instruments Corporation
2-9
NI PXIe-5450 User Manual
Power-Up and Reset Conditions
The signal generator is in the following state from the time at which the
computer begins to power up until the operating system is fully booted and
NI-FGEN is loaded.
•
The CH 0+/
−
and CH 1+/
−
differential output connectors are disabled
and each has 50
Ω
impedance to ground. This impedance is the same
as its previous setting before the device was powered down. The output
voltage amplitude of this connector is 0 V.
•
The CLK IN connector has high-impedance to ground.
•
PFI 0 and PFI 1 are tristated and have a 10 k
Ω
impedance to ground.
•
The CLK OUT connector is tristated and has a high-impedance to
ground.
•
PXI trigger lines are tristated and floating.
After the operating system is fully booted and NI-FGEN is loaded, or when
you perform a hard reset to the device directly from MAX or using
NI-FGEN, the signal generator is in the following state:
•
CH 0+/
−
and CH 1+/
−
output is enabled.
•
CH 0+/
−
and CH 1+/
−
output attenuation is set to 0 dB.
•
CLK OUT output impedance is set to high-impedance.
•
CLK IN is disabled and has a high-impedance to ground.
•
PFI 0 and PFI 1 are tristated and have a 10 k
Ω
impedance to ground.
•
PXI trigger lines are tristated and floating.
•
The sample rate is set to the maximum rate, with the Sample clock
source set to the internal Sample clock timebase.
•
The Sample clock timebase is tuned by the internal reference control
voltage.
