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7- 2
MC68306 USER'S MANUAL
MOTOROLA
An overview of the MC68306 implementation of IEEE 1149.1 is shown in Figure 7-1. The
MC68306 implementation includes a 16-state controller, a 3-bit instruction register, and
four test registers (a 1-bit bypass register, a 124-bit boundary scan register, a 3-bit module
mode register, and a 32-bit ID register). This implementation includes a dedicated TAP
consisting of the following signals:
TRST —
active low JTAG logic reset (with pullup).
TCK
—
test clock input to synchronize the test logic (with pulldown).
TMS —
test mode select input (with an internal pullup resistor) that is sampled on the
rising edge of TCK to sequence the TAP controller's state machine.
TDI
—
test data input (with an internal pullup resistor) that is sampled on the rising
edge of TCK.
TDO —
three-state test data output that is actively driven in the shift-IR and shift-DR
controller states. TDO changes on the falling edge of TCK.
3-BIT INSTRUCTION REGISTER
TAP
CTLR
TMS
TCK
BOUNDARY SCAN REGISTER
BYPASS
TDI
M
U
X
M
U
X
TDO
TEST DATA REGISTERS
(124 BITS)
2
0
123
0
TRST
2
0
31
0
ID = 2040101D
MODE
ID
DECODER
Figure 7-1. Test Access Port Block Diagram