KSZ884x-PMQL Evaluation Board User’s Guide
Micrel, Inc.
May, 2006
Rev.
1.1
12/27
4.6 EEPROM
Contents
4.6.1
EEPROM Format for the KSZ8841-PMQL-Eval Board
An external serial EEPROM with a standard micro wire bus interface is used for non-volatile
storage of information such as the host MAC address, power management information and
subsystem ID, etc. The KSZ8841-PMQL performs an automatic read from the external EEPROM
and places the data into certain host accessible registers after the system reset.
The EEPROM format is shown in Table 6 and Table 7.
Table 6: EEPROM Format and Content
WORD
15 8
7 0
0H Reserved
1H
Host MAC Address Byte 2
Host MAC Address Byte 1
2H
Host MAC Address Byte 4
Host MAC Address Byte 3
3H
Host MAC Address Byte 6
Host MAC Address Byte 5
4H Subsystem
ID
5H
Subsystem Vendor ID
6H
ConfigParam (see Table 7)
7H-3FH
Not used by KSZ88XX-PMQL (available for user to use)
Table 7: Format for the ConfigParam Word 6H
Bit Name Description
15 NEW_CAP
New Capabilities
Indicates whether or not the KSZ8841-PMQL implements a list of New capabilities.
When set, this bit indicates the presence of New capabilities. When reset, New
capabilities are not implemented.
14 NO_SRST
No Soft Reset
When this bit is set, it indicates that the KSZ8841-PMQL is transitioning from
D3_hot to D0 because PowerState commands do not perform an internal reset.
Configuration Context is preserved. Upon transition from the D3_hot to the D0
Initialized state, no additional operating system intervention is required to preserve
Configuration Context beyond writing to the PowerState bits.
When this bit is clear, KSZ8841-PMQL performs an internal reset upon
transitioning from D3_hot to D0 via software control of the PowerState bits.
Configuration Context is lost when performing the soft reset. Upon transition from
the D3_hot to the D0 state, full re-initialization sequence is needed to return the
device to D0 Initialized.
Regardless of this bit, devices that transition from D3_hot to D0 by a system or bus
segment reset will return to the device state D0 Uninitialized with only PME context
preserved if PME is supported and enabled.
This bit is loaded to bit 3 of CPMC register
13 Reserved
