KSZ884x-PMQL Evaluation Board User’s Guide
Micrel, Inc.
May, 2006
Rev.
1.1
13/27
Bit Name Description
12 PME_D2
PME -Support D2
When this bit is set, the KSZ8841-PMQ: asserts PME event when the KSZ8841-
PMQL is in D2 state and PME_EN is set. Otherwise, the KSZ8841-PMQL does not
assert PME event when the KSZ88X1P is in D2 state.
This bit is loaded to bit 13 of PMCR register.
11 PME_D1
PME Support D1
When this bit is set, the K88X1P asserts PME event when the K88X1P is in D1
state and PME_EN is set. Otherwise, the KSZ88X1P does not assert PME event
when the KSZ88X1P is in D1 state.
This bit is loaded to bit 12 of PMCR register.
10 D2_SUP
D2 support
When this bit is set, the KSZ88X1P supports D2 power state.
This bit is loaded to bit 10 of PMCR register.
9 D1_SUP
D1 support
When this bit is set, the KSZ88X1P supports D1 power state.
This bit is loaded to bit 9 of PMCR register.
8 - 6
Reserved
5 DSI
Device Specific Initialization
This bit indicates whether special initialization of this function is required (beyond
the standard PCI configuration header) before the generic class device driver is
able to use it.
A “1” indicates that the function requires a device specific initialization sequence
following transition to the D0 uninitialized state.
4 Reserved
3 PME_CK
PME Clock
When this bit is a “1”, it indicates that the function relies on the presence of the PCI
clock for PME# operation.
When this bit is a “0”, it indicates that no PCI clock is required for the function to
generate PME#.
2 - 0
PCI: PME_VER
PCI: Power Management PCI Version
4.6.2
EEPROM Content for KSZ8841-PMQL-Eval Board
The contents are for the user to reference, and can be changed based on a real application.
MAC Address: (
From Byte 6 to Byte 1)
00-01-02-03-04-05
Subsystem:
AA55
Subsystem Vendor ID:
55AA
Power Management in ConfigParam Word 6H:
Bit 15: enable new cap
= 1
Bit 14: no soft reset
= 1
Bit 13: Reserved
= (don’t care)
Bit 12: PMEN asserted from D2 =
1
Bit 11: PMEN asserted from D1 =
1
