MEN Mikro Elektronik A14C - 6U VME64 MPC8540, User Manual

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MENMON
MEN Mikro Elektronik GmbH 112
20A014-00 E2 – 2007-08-16
4.6.6.4 Reset Cause – Parameter rststat
The following rststat values are possible:
When MENMON starts up, it determines the reset cause and sets system parameter
rststat accordingly:
Table 52. MENMON – Reset causes through system parameter rststat
4.6.6.5 Hardware Monitor Support – Parameter psrXXX
MENMON supports the LM81 hardware monitor.
On MENMON start-up, the LM81 measurements are started and voltage limits are
set. One second after the limits have been set, the LM81 is programmed to generate
a reset on power failure. If the board is reset because the LM81 limit was exceeded,
the
rststat parameter is set to pdrop .
You can specify whether the board should be reset if one of the monitored values is
out of range. This can be done individually for each voltage.
By default all psrXXX parameters have the value "1" (i.e. reset enabled).
Table 53. MENMON – Voltage limits through system parameter psrXXX
In addition, the MENMON command LM81 shows the current voltages and
temperature value.
Overtemperature does not cause a board reset.
rststat Value Description
hrst Board was reset due to activation of HRESET line
pwon Power On
pdrop Power error (detected by 5V comparator or LM81), if enabled
swrst:nn Board was reset by software (by means of the board’s reset con-
troller).
nn is the hexadecimal value of FPGA system unit register
GPMEM.
The following values are defined for nn :
0x00
= No special reason
0x80
= OS panic (general)
0xA0
= OS panic due to ECC error
wdog Board was reset by FPGA watchdog timer unit
rbut Board was reset by an external reset pin (e.g. reset button)
Voltage
System Parameter to
enable reset
Tolerance
2.5V (DDR) psr2v5 ±10%
3.3V psr3v3 ±10%
5V psr5v ±10%
1.5V (FPGA) psr1v5 ±10%
1.0V (PHY) psr1v0 800mV..1100mV