COMPONENT MAINTENANCE MANUAL
AVIATION RECORDERS
Model FA5000
Initital Issue Page 13
Sep. 30/11
Description and Operation
23–70
−
40
Use or disclosure of information on this sheet is subject to
the restrictions on the cover page of this document.
F9
fpga_discrete_Output2
O
3.3VDC CMOS output pulled high to 3.3
volts by default. The CMOS low voltage
output, V
OL,
does not exceed 0.4VDC.
The signal controls an NFET gate hav
ing a 0.7VDC minimum voltage input
threshold. The NFET implements a
shunt discrete output assigned to FDR
MAINTENANCE FAULT. Referenced to
the Signal Ground.
E9
fpga_discrete_Output3
O
3.3VDC CMOS output pulled high to 3.3
volts by default. The CMOS low voltage
output, V
OL,
does not exceed 0.4VDC.
Referenced to the Signal Ground. No cir
cuitry exists on the AI PWA to support
this signal.
H3
Status_Relay_Power
O
Diode is5 volts DC relay coil
power. Referenced to the Signal Ground.
F7
fpga_FDRMaintenanceRe
lay_Feedback
I
Open/Ground input pulled high to 3.3
volts by default to be used as an optional
feedback to alert the processor of the
relay’s contact closure. Referenced to
the Signal Ground.
E7
fpga_FDRStatusRelay_Feed
back
I
Open/Ground input pulled high to 3.3
volts by default to be used as an optional
feedback to alert the processor of the
relay’s contact closure. Referenced to
the Signal Ground.
F10
fpga_RES_FDR_MAINTEN
ANCE_Control_reset
O
No circuitry exists on the AI PWA to sup
port this signal.
E10
fpga_RES_FDR_MAINTEN
ANCE_Control_set
O
3.3VDC CMOS output pulled high to 3.3
volts by default. The CMOS low voltage
output, V
OL,
does not exceed 0.4VDC.
The signal controls an NFET gate hav
ing a 0.5VDC minimum voltage input
threshold. The NFET controls relay coil
current to implement discrete signaling
through the relay contacts. Referenced
to the Signal Ground.
F11
fpga_RES_FDR_STATUS_C
ontrol_reset
O
No circuitry exists on the AI PWA to sup
port this signal.
The document reference is online, please check the correspondence between the online documentation and the printed version.
