CP307
Configuration
ID 34424, Rev. 3.0
Page 4 - 9
P R E L I M I N A R Y
Watchdog is retriggered normally, operation continues. The interrupt generated at the first tim-
eout is available to the application to handle the first timeout if required. As with all of the other
modes, the WTE bit is available for application use.
Table 4-6:
Watchdog Timer Control Register
REGISTER NAME
WATCHDOG TIMER CONTROL REGISTER
SIZE
ADDRESS
0x282
8 bits
BIT POSITION
MSB
7
6
5
4
3
2
1
0
LS
B
CONTENT
WTE
WMD1
WMD0
WEN/WTR
WTM3
WTM2
WTM1
WTM0
DEFAULT
0
0
0
0
0
0
0
0
ACCESS
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
NAME
DESCRIPTION / FUNCTION
7
WTE
Watchdog Timer Expired status bit:
0 Watchdog Timer has not expired
1 Watchdog Timer has expired
Writing a ’1’ to this bit resets it to 0
6 - 5
WMD[1:0]
Watchdog mode settings:
WMD1 WMD0
Mode
0 0
Timer
only
0 1
Reset
1 0
Interrupt
1 1
Dual
Stage
4
WEN/WTR Watchdog enable / watchdog trigger control bit:
0 Watchdog Timer has not been enabled
Prior to the Watchdog being enabled, this bit is known as WEN. After the Watchdog is
enabled, it is known as WTR. Once the Watchdog Timer has been enabled, this bit can-
not be reset to 0. As long as the Watchdog Timer is enabled, it will indicate a ’1’.
1 Watchdog Timer is enabled
Writing a ’1’ to this bit causes the Watchdog to be retriggered to the timer value indi-
cated by bits WTM[3:0].
3 - 0
WTM[3:0] Watchdog timeout time settings:
WTM3 WTM2 WTM1 WTM0 Value
0
0
0
0
125 ms
0
0
0
1
250 ms
0
0
1
0
500 ms
0
0
1
1
1 s
0
1
0
0
2 s
0
1
0
1
4 s
0
1
1
0
8 s
0
1
1
1
16 s
1
0
0
0
32 s
1
0
0
1
64 s
1
0
1
0
128 s
1
0
1
1
256 s
1
1
0
0
reserved
1
1
0
1
reserved
1
1
1
0
reserved
1
1
1
1
reserved
The nominal timeout period is 5% longer than the above-stated values.
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