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Functional Description
CP307
Page 2 - 22
ID 34424, Rev. 3.0
P R E L I M I N A R Y
Legend for Table 2-15:
With the GPIO_CFG0 signal on the Rear I/O module the active interface can be selected.
Warning!
The RIO_XXX signals are power supply
OUTPUTS
to supply the rear I/O mod-
ule with power. These pins
MUST NOT
be connected to any other power
source, either within the backplane itself or within a rear I/O module.
Failure to comply with the above will result in damage to your board.
Note ...
The signal on the GPIO configuration pin D4 tolerates only 3.3 V signalling and
has an internal pull-up resistor to 3.3V.
The pins for the interfaces COM1 and GPIO/COM2 (pins A18, A17, A16, B18,
B17, B16, B10, B7, C18, C14, C13, C11, D18, D10, E18, and E16) tolerate
only 3.3 V signaling and their inputs have internal pull-up resistors.
SATAx
Serial ATA port
lPx
Gigabit Ethernet port
USBx
USB interface and power
VGAx
VGA signals
COM1x
COM1 port
GPIOx
COM2 port or GPIO
PWRx
Power Management signals
5V/3.3V
Power
GPIO_CFG0
GPIO configuration (GPIO or COM2)
Table 2-17: GPIO Signal Description
GPIO SIGNAL
DESCRIPTION
GPIO_CFG0
0: COM1; GPIO
1: COM1; COM2
Note ...
The default value is 1 if the pin is not connected (pull-up resistor on CP307). If
connected, the default value is depending on the Rear I/O module.
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