Johnson Controls YORK OPTIVIEW CONTROL CENTER, Operation Manual

Page: 111 / 142

JOHNSON CONTROLS
111
SECTION 3 - OPTIVIEW DISPLAY MESSAGES
FORM 160.10-O1
ISSUE DATE: 4/27/2018
3
VSD – Logic Board Processor
This shutdown occurs if a communication problem
occurs between the two microprocessors on the VSD
Logic Board.
VSD – Run Signal
Redundant RUN signals are generated by the OptiView
Control Center; one via TB6-24 and the second via the
serial communications link. Upon receipt of either of
the two
RUN
commands by the VSD, a five (5) second
timer starts. If both run commands are not received by
the VSD logic board within five seconds, a shutdown
is performed and this message is displayed. This fault
is generally indicative of a wiring problem between the
OptiView Control Center and the VSD
VSD – Precharge – Low DC Bus Voltage
During precharge, the DC link must be equal to or
greater than 50 VDC (41 VDC for 50 Hz) within one-
half (0.5) second and 500 VDC within fifteen (15)
seconds after the precharge relay is energized. If this
condition is not met, a shutdown is performed and this
message is displayed.
VSD – Serial Communications
This fault occurs when communications between the
Adaptive Capacity Control (ACC) board and the VSD
logic board, or between the control center microboard
and the VSD logic board are disrupted. This is typi-
cally caused by defective wiring between J11 on the
VSD Logic Board and J8 on the ACC Board.
HARMONIC FILTER CYCLING SHUTDOWN
MESSAGES
The following cycling shutdown messages are dis-
played on compressor motor Variable Speed Drive
(VSD) applications with the optional harmonic filter
only. These messages are generated by events that oc-
cur within the VSD harmonic filter. The chiller will au-
tomatically restart when the cycling condition clears.
Service and troubleshooting information is contained
in the Variable Speed Drive – Service Manual (Form
160.00-M1).
Harmonic Filter – Logic Board Or
Communications
This message is displayed when communications be-
tween the harmonic filter and the VSD logic board are
disrupted. The communications must be interrupted for
ten (10) continuous communications cycles (20 sec-
onds) before the shutdown will occur.
Harmonic Filter – Phase Locked Loop
This shutdown indicates that a circuit called PHASE
LOCKED LOOP on the filter logic board has lost syn-
chronization with the incoming power line. This is
usually indicative of an open fuse in one of the filter’s
incoming power line. Filter power fuses 11FU, 12FU
and 13FU should be checked.
Harmonic Filter – High Phase X (A, B, or C)
Current
The maximum instantaneous harmonic filter current
for each current phase is monitored and compared to a
preset limit. If this limit is exceeded, a shutdown is per-
formed and this message for the current phase affected
is generated. The filter current is monitored using two
DCCT’s (DC Current Transformer) and these signals
are processed by the filter logic board. The preset lim-
its are as follows:
• 351/292 HP: 356 Amps
• 503/419 HP: 496 Amps
• 790/658 HP: 745 Amps
• 1048/917 HP: 385 AMPS
If the VSD automatically restarts after this shutdown
and continues to operate properly with the filter operat-
ing, most likely the filter tripped due to a sag or surge
in the voltage feeding the VSD. If this message reoc-
curs, preventing the chiller from starting, the VSD will
require service.
Harmonic Filter – High DC Bus Voltage
This shutdown occurs if the voltage level applied to the
Harmonic Filter exceeds 860 VAC. The specified voltage
range is 414 to 508 VAC. If the incoming voltage is in
excess of 508, steps should be taken to reduce the level
to within specified limits. The cause of this message is
typically high line voltage or a surge on the utility supply.
The harmonic filter has a DC bus as part of the filter
power assembly, and this DC link is not connected in
any way with the VSD’s DC link.
Harmonic Filter – Low DC Bus Voltage
This shutdown occurs when the filter’s DC link voltage
decreases to a level less than 60 VDC below the filter
DC link voltage setpoint. This setpoint is determined
by the filter logic board via the sensing of the three
phase input line-to-line voltage. The setpoint is set to
the peak of the sensed input line-to-line voltage plus 32
volts, not to exceed 760 volts.