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Thermal/Mechanical Specifications and Design Guide

105

Quality and Reliability Requirements

9

Quality and Reliability 

Requirements

9.1

Use Conditions

Intel evaluates reliability performance based on the use conditions (operating 
environment) of the end product by using acceleration models. 

The use condition environment definitions provided in 

Table 9-1

 and 

Table 9-2

 are 

based on speculative use condition assumptions, and are provided as 

examples only

.

Based on the system enabling boundary condition, the solder ball temperature can vary 

and needs to be comprehended for reliability assessment.

Table 9-1.

Use Conditions Environment (System Level)

Use Environment

Speculative 

Stress Condition

Example Use 

Condition

Example 7-Yr 

Stress Equiv.

Example 10-Yr 

Stress Equiv.

Slow small internal 

gradient changes due to 

external ambient 

(temperature cycle or 

externally heated)
Fast, large gradient 

on/off to max operating 

temp.
(power cycle or 

internally heated 

including power save 

features)

Temperature Cycle

DT = 35–44 °C

(solder joint)

550–930 cycles

Temp Cycle 

(-25 °C to 100 °C)

780–1345 cycles

Temp Cycle 

(-25 °C to 100 °C)

High ambient moisture 

during low-power state 

(operating voltage)

THB/HAST

T = 25–30 °C

85%RH

(ambient)

110–220 hrs at

110 °C 85%RH

145–240 hrs at 

110 °C 85%RH

High Operating 

temperature and short 

duration high 

temperature exposures

Bake

T = 95–105 °C

(contact)

700–2500 hrs at

125 °C

800–3300 hrs at

125 °C

Summary of Contents for BX80619I73820

Page 1: ...LGA2011 0 Socket Thermal Mechanical Specification and Design Guide Supporting Desktop Intel Core i7 3960X i7 3970X Extreme Edition Processor the Intel Core i7 3000K Processor Series and the Intel Cor...

Page 2: ...e changes to them The products in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata a...

Page 3: ...4 Pick and Place Cover 24 3 4 5 Socket Standoffs and Package Seating Plane 26 3 5 Durability 26 3 6 Markings 26 3 7 Component Insertion Forces 26 3 8 Socket Size 26 4 Independent Loading Mechanism ILM...

Page 4: ...1 2 2 GetDIB 56 7 1 2 3 GetTemp 58 7 1 2 4 RdPkgConfig 59 7 1 2 5 WrPkgConfig 61 7 1 2 6 Package Configuration Capabilities 62 7 1 2 7 Processor Thermal and Power Optimization Capabilities 68 7 1 3 Pe...

Page 5: ...achment to the ILM 100 8 6 Thermal Interface Material 100 8 7 Tall Heat Pipe Heat Sink Performance 101 8 8 Thermal Design Guidelines 102 8 8 1 Intel Turbo Boost 2 Technology 102 8 8 2 Thermal Characte...

Page 6: ...ck Plate and ILM onto the Motherboard 34 4 11 Optional Step Lock down the Hinge Lever 35 4 12 Pin 1 Markings on the ILM Frame 36 4 13 Closing ILM and Loadplate 36 4 14 ILM with Cover 37 4 15 Heatsink...

Page 7: ...Primary Top Side 99 8 4 T HPHS Psi ca versus RPM 101 8 5 T HPHS Sound Power BA versus RPM 101 8 6 Processor Thermal Characterization Parameter Relationships 103 A 1 Board Keepin Keepout Zones Sheet 1...

Page 8: ...unction Support 88 7 17 PECI Client Response During Power Up 88 7 18 SOCKET ID Strapping 89 7 19 Power Impact of PECI Commands versus C states 90 7 20 Domain ID Definition 92 7 21 Multi Domain Command...

Page 9: ...tory Revision Number Description Revision Date 001 Initial release November 2011 002 Added Desktop Intel Core i7 3970X Extreme Edition Processor Updated EOL loading specification and added note that B...

Page 10: ...10 Thermal Mechanical Specifications and Design Guide...

Page 11: ...tel Core i7 Processor Family Intel Core i7 3970X processor Extreme Edition Intel Core i7 3960X processor Extreme Edition Intel Core i7 3930K processor Intel Core i7 3820 processor The components descr...

Page 12: ...solutions interface with the processor at the IHS surface Square ILM Independent Loading Mechanism provides the force needed to seat the 2011 LGA package onto the socket contacts and has 80 80 mm heat...

Page 13: ...perature Thermal Profile Line that defines case temperature specification of a processor at a given power level TIM Thermal Interface Material The thermally conductive compound between the heatsink an...

Page 14: ...Introduction 14 Thermal Mechanical Specifications and Design Guide...

Page 15: ...er IHS is attached to the package substrate and core and serves as the mating surface for processor component thermal solutions such as a heatsink Figure 2 1 shows a sketch of the processor package co...

Page 16: ...m 7 Guidelines on potential IHS flatness variation with socket load plate actuation and installation of the cooling solution is available in the Chapter 8 2 1 2 Processor Component Keep Out Zones The...

Page 17: ...tsink mass from Table 5 3 with an 11 ms duration average load superimposed on the static load requirement 5 See Section 5 3 for minimum socket load to engage processor within socket 2 1 4 Package Hand...

Page 18: ...ocessor Materials Component Material Integrated Heat Spreader IHS Nickel Plated Copper Substrate Halogen Free Fiber Reinforced Resin Substrate Lands Gold Plated Copper Figure 2 3 Processor Top Side Ma...

Page 19: ...many benefits Socket contact density increased by 12 while maintaining 40 mil minimum via pitch requirements Corresponding square pitch array s would require a 38 mil via pitch for the same package si...

Page 20: ...aving a uniform load on the socket solder joints and the contacts Socket loading specifications are listed in Chapter 5 Schematic for LGA2011 0 socket is shown in Figure 3 3 The seating plane is shown...

Page 21: ...Thermal Mechanical Specifications and Design Guide 21 LGA2011 0 Socket Figure 3 4 LGA2011 0 Socket Contact Numbering Top View of Socket...

Page 22: ...is defined in Figure 3 5 Note All dimensions are in mm 3 2 Board Layout The land pattern for the LGA2011 0 socket is 40 mils hexagonal array For CTF Critical to Function joints the pad size will prima...

Page 23: ...to the motherboard by 2011 solder balls There are no additional external methods that is screw extra solder adhesive and so forth to attach the socket As indicated in Figure 3 8 the Independent Loadi...

Page 24: ...The socket has the following solder ball material Lead free SAC305 SnAgCu solder alloy with a silver Ag content 3 copper Cu 0 5 tin Sn 96 5 and a melting temperature of approximately 217 C The immersi...

Page 25: ...esigned to not be compatible See Section 4 3 for additional information on ILM assembly to the board Cover retention must be sufficient to support the socket weight during lifting translation and plac...

Page 26: ...6 point 2 125 mm Manufacturer s insignia font size at supplier s discretion Lot identification code allows traceability of manufacturing date and location All markings must withstand 260 C for 40 sec...

Page 27: ...GA2011 0 socket Intel performs detailed studies on integration of processor package socket and ILM as a system These studies directly impact the design of the ILM The Intel reference ILM will be built...

Page 28: ...nd Figure 4 2 hinge lever active lever load plate load frame ILM cover and the captive fasteners For clarity the ILM cover is not shown in this view Note The ILM assembly also contains an ILM cover as...

Page 29: ...the socket body to the board inducing a slight compression on the solder joints Figure 4 3 shows the attachment points of the thermal solution to the ILM frame and the ILM to the back plate This attac...

Page 30: ...ing the ILM the interlocking features are intended to prevent the hinge lever from being latched first If an attempt is made to close the hinge lever first the hinge lever end stop will prevent the us...

Page 31: ...4 2 2 ILM Opening Sequence For the opening sequence the goal is to always open the hinge lever first to prevent the loadplate from springing open The only option is to release the hinge lever first Th...

Page 32: ...load plate by pushing down on the hinge lever Figure 4 7 this will cause the load plate tab to rise above the socket Grasp the tab only after it has risen away from the socket open load plate to full...

Page 33: ...ss to test points and backside capacitors Two additional cut outs on the backplate provide clearance for backside voltage regulator components An insulator is pre applied by the vendor to the side wit...

Page 34: ...detailed instruction for lead free manufacturing of complex interconnects on the Intel Learning Network http iln intel com Portal Scripts Home Home aspx 2 Assemble the back plate onto the bottom side...

Page 35: ...the PnP cover and installing the processor Figure 4 11 If the hinge lever is locked down when the ILM is open then the load plate will be locked in the open position and less likely to fall closed if...

Page 36: ...ped a cover that will snap on to the ILM for the LGA2011 socket family The ILM cover is intended to reduce the potential for socket contact damage from the operator customer fingers being close to the...

Page 37: ...eability between validated ILM vendors for LGA2011 0 socket The ILM cover for the LGA2011 0 socket will have a flammability rating of V 0 per UL 60950 1 Note Intel recommends removing the Pick and Pla...

Page 38: ...Mechanism ILM 38 Thermal Mechanical Specifications and Design Guide Note For IHS height above board see Table 5 2 Figure 4 15 Heatsink to ILM Interface 4 178 0 38 0 20 See Note Below 80 00 80 00 38 0...

Page 39: ...M closed and the processor fully seated in the socket Notes 1 This data is provided for information only and should be derived from a the height of the socket seating plane above the motherboard after...

Page 40: ...d this dynamic load 7 Conditions must be satisfied at the beginning of life BOL and the loading system stiffness for non reference designs need to meet a specific stiffness range to satisfy end of lif...

Page 41: ...and 100 C This is monitored by measuring the daisy chain resistance of all socket contacts in series across the socket and dividing by the number of contacts measured The resulting value must be belo...

Page 42: ...LGA2011 0 Socket and ILM Electrical Mechanical and Environmental Specifications 42 Thermal Mechanical Specifications and Design Guide...

Page 43: ...ed systems the processor must remain within the minimum and maximum case temperature TCASE specifications as defined by the applicable thermal profile Thermal solutions not designed to provide suffici...

Page 44: ...are based on the TCC Activation MSR having a value of 100 see Section 6 2 1 6 These values are specified at VCC_MAX and VNOM for all other voltage rails for all processor frequencies Systems must be d...

Page 45: ...tion details Figure 6 1 TTV Thermal Profile Table 6 2 130W TTV Thermal Profile Sheet 1 of 2 Power W Maximum TTV TCASE C Power W Maximum TTV TCASE C 0 43 4 66 55 3 2 43 8 68 55 6 4 44 1 70 56 0 6 44 5...

Page 46: ...ustic benefit of the DTS specification ambient temperature monitoring is necessary 36 49 9 102 61 8 38 50 2 104 62 1 40 50 6 106 62 5 42 51 0 108 62 8 44 51 3 110 63 2 46 51 7 112 63 6 48 52 0 114 63...

Page 47: ...IHS Figure 6 2 illustrates the location where TCASE temperature measurements should be made A dimensioned drawing for milling the groove to place the thermocouple on the IHS can be found in Appendix...

Page 48: ...lligently selects the appropriate TCC method to use on a dynamic basis BIOS is not required to select a specific method as with previous generation processors supporting TM1 or TM2 The Adaptive Therma...

Page 49: ...regulator must support dynamic SVID steps to support this method During the voltage change it will be necessary to transition through multiple SVID codes to reach the target operating voltage Each st...

Page 50: ...DULATION MSR In On Demand mode the duty cycle can be programmed from 6 25 on 93 75 off to 93 75 on 6 25 off in 6 25 increments On Demand mode may be used in conjunction with the Adaptive Thermal Monit...

Page 51: ...st be removed within the timeframe which is TBD at this point The temperature at which THERMTRIP_N asserts is not user configurable and is not software visible 6 3 Platform Environment Control Interfa...

Page 52: ...e Chapter 7 for the PECI command details 6 4 Fan Speed Control with Digital Thermal Sensor Processor fan speed control is managed by comparing DTS temperature data against the processor specific value...

Page 53: ...n information The PECI bus offers A wide speed range from 2 Kbps to 2 Mbps CRC check byte used to efficiently and atomically confirm accurate data delivery Synchronization at the beginning of every me...

Page 54: ...sets from that reference PECI based access to the processor package configuration space provides a means for Super IO SIO or other platform management devices to actively manage the processor memory p...

Page 55: ...e PECI client The FCS byte is the result of a cyclic redundancy check CRC of each data block 7 1 2 1 Ping Ping is a required message for all PECI devices This message is used to enumerate devices or d...

Page 56: ...ion At a minimum all clients supporting GetDIB will return the number of domains inside the package using this field With any client at least one domain Domain 0 must exist Therefore the Number of Dom...

Page 57: ...upported by the PECI client as defined in Table 7 2 Figure 7 5 Revision Number Definition Table 7 2 Minor Revision Number Meaning Revision Field Minor Revision Bits 3 0 Supported Features 0x0 Ping Get...

Page 58: ...fined as a negative number below Tjmax TCONTROL may be extracted from the processor by issuing a PECI RdPkgConfig command as described in Section 7 1 2 4 or using a RDMSR instruction TCONTROL applicat...

Page 59: ...5 Read Length 0x05 dword Command 0xA1 Description Returns the data maintained in the processor package configuration space for the PCS entry as specified by the index and parameter fields The index fi...

Page 60: ...3 0x05 8 7 Cmd Code 0xa1 6 12 FCS Client Address Completion Code 5 LSB Data 1 2 or 4 bytes MSB 4 14 Write Length 0x05 9 FCS Table 7 4 RdPkgConfig Response Definition Response Meaning Bad Write FCS Ele...

Page 61: ...This command supports only dword data writes on the processor PECI clients All command responses include a completion code that provides additional pass fail status information Refer to Section 7 1 7...

Page 62: ...refresh rates and throttle the memory subsystem as appropriate Memory temperature data may be derived from a variety of sources including on die or on board DIMM sensors DRAM activity information or a...

Page 63: ...based rank temperature estimation DIMM Ambient Temperature Read 19 0x0000 Absolute temperature in Degrees C to be used as ambient temperature reference N A Read ambient temperature reference for acti...

Page 64: ...serves as a multiplier for translation of DRAM energy changes to corresponding temperature changes and may be derived from actual platform characterization data The Scaling Factor is used to convert m...

Page 65: ...n die DIMM thermal sensors It is also possible for the PECI host controller to read back the DIMM ambient reference temperature Since the ambient temperature may vary over time within a system it is r...

Page 66: ...used to specify the channel index Units used are defined as per the Package Power SKU Unit read described in Section 7 1 2 7 This information is tracked by a 32 bit counter that wraps around Note tha...

Page 67: ...ctual values are chosen based on DRAM power consumption characteristics The units for the DRAM Power Limit and Control Time Window are determined as per the Package Power SKU Unit settings described i...

Page 68: ...00 Time Energy and Power Units N A Read units for power energy and time used in power control registers Package Power SKU LOW Read 28 0x0000 Package Power SKU 31 0 N A Returns Thermal Design Power and...

Page 69: ...for VCC Power Plane Write 25 0x0000 N A Power Limit Data Program power limit for VCC power plane Power Limit for VCC Power Plane Read 25 0x0000 Power Limit Data N A Read power limit data for VCC powe...

Page 70: ...emperature data returned is instantaneous temperature updated every 1 mS ACPI P T Notify Read Write 33 0x00 Reads the last ACPI P State limit from PCU Notifies PCU of the last ACPI notify for P State...

Page 71: ...tible with the processor Note that the value of the Platform ID or Processor Flag 2 0 as shown in Figure 7 20 is typically unique to the platform type and processor stepping Uncore Device ID This info...

Page 72: ...eturns error information as logged by the processor power control unit 7 1 2 7 2 Package Power SKU Unit Read This feature enables the PECI host to read the units of time energy and power used in the p...

Page 73: ...The exact power impact of such a pop up is determined by the product SKU the C state from which the pop up is initiated and the negotiated PECI bit rate A reset or clear of this bit or simply not sett...

Page 74: ...Control Circuit TCC activation Bidirectional PROCHOT_N signal assertion Critical Temperature Both status and sticky log bits are managed in this status word All sticky log bits are set upon a rising e...

Page 75: ...window size of 24 or 16 samples More details on the PECI temperature filtering function can be found in Section 7 46 7 1 3 Per Core Temperature Read This feature allows to read per core temperature f...

Page 76: ...ssor PECI clients the only logic that can be thermally constrained is that supplied by VCC 7 1 4 2 Current Limit Read This read returns the current limit for the processor VCC power plane in 1 8A incr...

Page 77: ...operating systems and drivers can balance the power budget using these two limits Two separate PECI requests are available to program the lower and upper 32 bits of the power limit data shown in Figur...

Page 78: ...platform performance power ratios by appropriate budgeting between multiple packages 7 1 4 8 Socket Performance Indication Read This read returns information on the total number of retired instruction...

Page 79: ...ithin the processor The Processor ID always refers to the same physical location in the processor silicon regardless of configuration as shown in the example in Figure 7 37 For example if certain logi...

Page 80: ...h LSB first and MSB last Figure 7 37 Processor ID Construction Example Figure 7 38 RdIAMSR Process Name 1 3 Byte Definition Byte 0 2 15 17 Data 1 2 4 or 8 bytes MSB 14 16 18 FCS Read Length 0x02 0x03...

Page 81: ...ification of PECI wake mode behavior if appropriate CC 0x90 Unknown Invalid Request CC 0x91 PECI control hardware firmware or associated logic error The processor is unable to process the request Tabl...

Page 82: ...x0 0xF 0x040E IA32_MC3_ADDR 0x0 0xF 0x0429 IA32_MC10_STATUS 0x0 0xF 0x0291 IA32_MC17_CTL2 0x0 0xF 0x040F IA32_MC3_MISC 0x0 0xF 0x042A IA32_MC10_ADDR 0x0 0xF 0x0445 IA32_MC17_STATUS 0x0 0xF 0x0410 IA32...

Page 83: ...dering with LSB first and MSB last 7 1 4 10 2 Supported Responses The typical client response is a passing FCS a passing Completion Code and valid data Under some conditions the client s response will...

Page 84: ...rite to the proper device Since there is a one to one mapping between any given client address and the bus number any request made with a bad Bus number is ignored and the client will respond with all...

Page 85: ...is a passing FCS a passing Completion Code and valid data Under some conditions the client s response will indicate a failure The PECI client response can also vary depending on the address and data I...

Page 86: ...ted as shown in Figure 7 41 The write command is subject to the same address configuration rules as defined in Section 7 1 4 11 PCI configuration writes may be issued in byte word or dword granularity...

Page 87: ...AW FCS 12 Byte FCS 13 14 15 Write Length 0x07 0x08 0x0a Host ID 7 1 Retry 0 4 8 Read Length 0x01 5 6 Cmd Code 0xe5 10 11 Client Address 9 LSB PCI Configuration Address MSB LSB Data 1 2 or 4 bytes MSB...

Page 88: ...available 500 uS after RESET_N de assertion as shown in Figure 7 44 PECI will be fully functional with all services including core accesses being available when the core comes out of reset upon comple...

Page 89: ...is configured through the settings of the SOCKET_ID 1 0 signals Each processor socket in the system requires that the two SOCKET_ID signals be configured to a different PECI addresses Strapping the SO...

Page 90: ...can cause a package pop up to the C2 state and enable successful completion of the command The exact power impact of a pop up to C2 will vary by product SKU the C state from which the pop up is initi...

Page 91: ...r power control unit hardware firmware or associated register logic Additionally the RdPCIConfigLocal and WrPCIConfigLocal commands may also be serviced in this case It is recommended that the PECI or...

Page 92: ...use of the GetDIB command The revision number returned by the PECI client processor always maps to the revision number of the PECI specification that it is designed to The next step in the enumeratio...

Page 93: ...signed to communicate the pass fail status of the command and may also provide more detailed information regarding the class of pass or fail For all commands listed in Section 7 1 2 that support compl...

Page 94: ...nse policies may be employed at the discretion of the originator developer Table 7 23 Device Specific Completion Code CC Definition Completion Code Description 0x40 Command Passed CC 0x80 Response tim...

Page 95: ...tside its operating range and hence PECI temperature readings are never positive The changes in PECI data counts are approximately linear in relation to changes in temperature in degrees centigrade A...

Page 96: ...tional range are reserved to signal temperature sensor errors These are summarized in Table 7 25 Table 7 25 Error Codes and Descriptions Error Code Description 0x8000 General Sensor Error GSE 0x8001 R...

Page 97: ...heatsinks These values are used to generate processor thermal specifications and to provide guidance for heatsink design All Boundary Conditions are specified at 35 o C system ambient temperature and...

Page 98: ...per air flow Consult motherboard documentation for recommendation Engage each of the 4 retention screws by 1 2 turns following a cross pattern This ensures that none of the screws are cross threaded a...

Page 99: ...d level keep out zone is available Contact your field sales representative for these documents The chassis obstruction height allows for appropriate fan inlet airflow to ensure fan performance and the...

Page 100: ...m as long as the mathematical product does not exceed 132 lbf The Total Static Compressive Load Table 5 3 should also be considered in dynamic assessments 8 5 Attachment to the ILM Refer to Figure 4 1...

Page 101: ...wo figures show the Psi ca versus RPM Figure 8 4 and Sound Power BA versus RPM Figure 8 5 Notes 1 The target Psi ca of 0 199 C W is at approximately 1800 RPM 2 The curve fit equation for this graph is...

Page 102: ...lt in higher acoustics 8 8 2 Thermal Characterization Parameter The case to local ambient Thermal Characterization Parameter CA is defined by Equation 8 1 CA TTTV CASE TLA TDP Where TTTV CASE Thermal...

Page 103: ...the sensor temperature below TCONTROL or to ensure compliance with the Tcase profile The PECI command for DTS is GetTemp Through use of a sign bit the value returned from PECI is negative The PECI co...

Page 104: ...Thermal Solutions 104 Thermal Mechanical Specifications and Design Guide...

Page 105: ...ble 9 1 Use Conditions Environment System Level Use Environment Speculative Stress Condition Example Use Condition Example 7 Yr Stress Equiv Example 10 Yr Stress Equiv Slow small internal gradient cha...

Page 106: ...units under test should be preconditioned for 72 hours at 45 C The purpose is to account for load relaxation during burn in stage The test sequence should always start with a visual inspection after...

Page 107: ...al solution parts The pass criterion is that the system under test shall successfully complete the checking of BIOS basic processor functions and memory without any errors Intel PC Diags is an example...

Page 108: ...tel will be providing guidance on the mechanical impact to using a HFR free laminate in the PCB Lead free and Pb free Lead has not been intentionally added but lead may still exist as an impurity belo...

Page 109: ...anical Drawings A Mechanical Drawings Table A 1 lists the Mechanical drawings included in this appendix Table A 1 Mechanical Drawing List Description Figure Board Keepin Keepout Zones Sheet 1 of 2 Fig...

Page 110: ...GE BLVD P O BOX 58119 SANTA CLARA CA 95052 8119 CMTE TITLE LGA 2011 SOCKET ATX KEEP INS SIZE DRAWING NUMBER REV A1 E76352 1 4 SCALE NONE DO NOT SCALE DRAWING SHEET 1 OF 2 N A N A FINISH MATERIAL DATE...

Page 111: ...104 00 4X 4 50 THIS DRAWING CONTAINS INTEL CORPORATION CONFIDENTIAL INFORMATION IT IS DISCLOSED IN CONFIDENCE AND ITS CONTENTS MAY NOT BE DISCLOSED REPRODUCED DISPLAYED OR MODIFIED WITHOUT THE PRIOR W...

Page 112: ...Mechanical Drawings 112 Thermal Mechanical Specifications and Design Guide...

Page 113: ...1 lists the socket drawings included in this appendix Table B 1 Socket Drawing List Drawing Description Figure Number Socket Mechanical Drawing Sheet 1 of 4 Figure B 1 Socket Mechanical Drawing Sheet...

Page 114: ...Socket Mechanical Drawings 114 Thermal Mechanical Specifications and Design Guide Figure B 1 Socket Mechanical Drawing Sheet 1 of 4...

Page 115: ...Thermal Mechanical Specifications and Design Guide 115 Socket Mechanical Drawings Figure B 2 Socket Mechanical Drawing Sheet 2 of 4...

Page 116: ...Socket Mechanical Drawings 116 Thermal Mechanical Specifications and Design Guide Figure B 3 Socket Mechanical Drawing Sheet 3 of 4...

Page 117: ...Thermal Mechanical Specifications and Design Guide 117 Socket Mechanical Drawings Figure B 4 Socket Mechanical Drawing Sheet 4 of 4...

Page 118: ...Socket Mechanical Drawings 118 Thermal Mechanical Specifications and Design Guide...

Page 119: ...Solutions Customers can purchase the Intel reference or collaboration thermal solutions from the suppliers listed in Table C 1 and Table C 2 Table C 1 Suppliers for the Intel Reference Thermal Solutio...

Page 120: ...29 Y02 LGA2011 0 Backplate E91834 001 ITLE91834001 PT44P41 4401 DCA HSK 182 T02 Supplier Contact Info SJ Yeoh sjyeoh amtek com cn 86 752 263 4562 Socket Katie Wang katie wang foxcon n com Tel 1 714 60...

Page 121: ...Drawings D Package Mechanical Drawings Table D 1 lists the mechanical drawings included in this appendix Table D 1 Mechanical Drawing List Drawing Description Figure Number Processor Package Drawing...

Page 122: ...Package Mechanical Drawings 122 Thermal Mechanical Specifications and Design Guide Figure D 1 Processor Package Drawing Sheet 1 of 2...

Page 123: ...Thermal Mechanical Specifications and Design Guide 123 Package Mechanical Drawings Figure D 2 Processor Package Drawing Sheet 2of 2...

Page 124: ...Package Mechanical Drawings 124 Thermal Mechanical Specifications and Design Guide...

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