IEI Technology WAFER-8523, User Manual

Page: 29 / 177

WAFER-8523 User Manual
Page 14
Power Management Logic is ACPI 2.0 compliant
Enhanced Hub Interface
Firmware Hub (FWH) Interface supports BIOS memory size up to 8 MB
Low Pin Count (LPC) Interface supports two Master/DMA devices
Enhanced DMA Controller
Real-Time Clock 256-byte battery-backed CMOS RAM
Supports SMBus 2.0 Specification
GPIO
2.6.2 Intel
®
ICH4 Audio Codec ’97 Controller
The Audio Codec ’97 (AC’97) controller integrated into the ICH4 complies with AC’97
Component Specification, Version 2.3. The AC’97 controller is connected to the onboard
audio connector. The audio connector is connected to an optional 5.1 channel or 7.1
channel audio kit with an embedded AC’97 audio codec. The AC’97 controller supports up
to six PCM audio output channels. Complete surround sound requires six-channel audio
consisting of:
Front left
Front right
Back left
Back right
Center
Subwoofer
2.6.3 Intel
®
ICH4 Low Pin Count (LPC) Interface
The ICH4 LPC interface complies with the LPC 1.0 specifications. The LPC bus from the
ICH4 is connected to the following components:
BIOS chipset
Super I/O chipset