4
4-3
After the correct program code is transferred to RAM, the LAN and GPIB
Interfaces are initialized. If the N4865A has a good LAN connection, it starts
the instrument discovery process. When the N4865A has linked to an instru-
ment, it is ready to receive messages from a GPIB Controller. The operating
system handles all of the GPIB communication issues and decides what actions
are required on the GPIB bus.
The power supply is a switching regulator that converts the unregulated DC input
to +5 volts DC to run the N4865A’s peripheral logic chips. A 3.3 regulator
regulates the 5 Vdc down to 3.3 volts to power the processor and major logic
chips. (RAM, FLASH and LAN Interface). Satisfactory DC input range is
+9 to +32 Vdc.
Summary of Contents for N4865A
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