Hitachi FL.NET, User Manual

Page: 162 / 307

5 USER GUIDE
5-110
[CPU01 or LPU01 side ladder program]
When the R0A0 turns ON, the program runs and checks the network participation status bit
(R088) and user-requested-processing-in-progress bit (R080) in the self-node status flag
(message processing can be performed when the network participation status bit is set with
the user-requested-processing-in-progress bit reset.)
The parameters for transparent-message transmission are specified by mathematical/logical
functions.
DST 18 = FL400 (MOV 18 = FL400 for the S10V)
The message transmission service number is set to 18. A transparent-message
transmission request is specified.
DST 2 = FL402 (MOV 2 = FL402 for the S10V)
The remote station (CPU02 or LPU02) is specified.
AST RW090 = FL404
The error code storage address (RW090 real address) is specified.
AST FW000 = FL406
The transmission buffer address (FW000 real address) is specified.
DST 1024 = FL408 (MOV 1024 = FL408 for the S10V)
The transmission word count is specified.
The description in parentheses is for the S10V.
（
MOV
）
DST 18 = FL400
F
（
MOV
）
DST 2 = FL402
F
AST RW090 = FL404
F
AST
FW000 = FL406
F
（
MOV
）
DST 1024 = FL408
F
（ MOV ） DST 11000 = FL40A
F
FLCM
HE2800 （ FW400 ）
F
（ 00001 ）
R0A0
V000
R088
R080