6 Configuration Mode Introduction
6.2 JTAG Configuration
UG290-2.5.2E
52(98)
Figure 6-28 Timing Diagram of Sending 0x06 via GW2A series JTAG Simulating
SPI
Figure 6-29 Timing Diagram of Sending 0x06 via GW1N series JTAG Simulating
SPI
Program SPI Flash in JTAG Boundary Scan Mode
The principle of this mode is changing the state of the pins connected
to SPI by using Boundary Scan method to implement SSPI timing, and then
to program the internal Flash.
The length of the Boundary Scan Chain used in this mode is 8 bits.
Every two bits combination corresponds to the pin state, as shown in Table
6-10. One SCLK drive is completed every two times of sending Boundary
Scan Chain.
Table 6-10 Pin State
Pins Name of SPI Flash
SCLK
CS
DI
DO
Bscan Chain[7:0]
7
6
5
4
3
2
1
0
(ctrl & data)
0
0
0
1
