Freescale Semiconductor MPC8358E, Hardware Specificftion

Page: 42 / 108

MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
42 Freescale Semiconductor
Local Bus
9.1 Local Bus DC Electrical Characteristics
Table 39 provides the DC electrical characteristics for the local bus interface.
9.2 Local Bus AC Electrical Specifications
Table 40 describes the general timing parameters of the local bus interface of the device.
Table 39. Local Bus DC Electrical Characteristics
Parameter Symbol Min Max Unit
High-level input voltage V
IH
2 OV
DD
+ 0.3 V
Low-level input voltage V
IL
–0.3 0.8 V
High-level output voltage, I
OH
= –100
μ
A V
OH
OV
DD
– 0.4 — V
Low-level output voltage, I
OL
= 100
μ
A V
OL
— 0.2 V
Input current I
IN
— ±10
μ
A
Table 40. Local Bus General Timing Parameters—DLL Enabled
Parameter Symbol
1
Min Max Unit Notes
Local bus cycle time t
LBK
7.5 — ns 2
Input setup to local bus clock (except LUPWAIT) t
LBIVKH1
1.7 — ns 3, 4
LUPWAIT input setup to local bus clock t
LBIVKH2
1.9 — ns 3, 4
Input hold from local bus clock (except LUPWAIT) t
LBIXKH1
1.0 — ns 3, 4
LUPWAIT input hold from local bus clock t
LBIXKH2
1.0 — ns 3, 4
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT1
1.5 — ns 5
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT2
3.0 — ns 6
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT3
2.5 — ns 7
Local bus clock to LALE rise t
LBKHLR
— 4.5 ns —
Local bus clock to output valid (except LAD/LDP and LALE) t
LBKHOV1
— 4.5 ns —
Local bus clock to data valid for LAD/LDP t
LBKHOV2
— 4.5 ns 3
Local bus clock to address valid for LAD t
LBKHOV3
— 4.5 ns 3
Output hold from local bus clock (except LAD/LDP and LALE) t
LBKHOX1
1.0 — ns 3
Output hold from local bus clock for LAD/LDP t
LBKHOX2
1.0 — ns 3