Nexus3/ Module
e200z3 Power Architecture Core Reference Manual, Rev. 2
Freescale Semiconductor
10-17
10.4.6
Read/Write Access Data Register (RWD)
The read/write access data register, shown in
, provides the data to/from system bus
memory-mapped locations when initiating a read or a write access.
Read/write accesses to the AHB require that the debug firmware properly retrieve/place the data in the
RWD. Table 10-15 shows the proper placement of data into the RWD. Note that double-word transfers
require two passes through RWD.
31
0
Field
Read/Write Data
Reset
All zeros
R/W
Read/Write
Number
0x9
Figure 10-9. Read/Write Access Data Register (RWD)
Table 10-15. RWD data placement for Transfers
Transfer Size
and Byte Offset
RWA(2–0)
RWCS[SZ]
RWD
31–24
23–16
15–8
7–0
Byte
x x x
0 0 0
—
—
—
X
Half
x x 0
0 0 1
—
—
X
X
Word
x 0 0
0 1 0
X
X
X
X
Doubleword
0 0 0
0 1 1
First RWD pass (low order data)
X
X
X
X
Second RWD pass (high order data)
X
X
X
X
Note:
"X" indicates byte lanes with valid data
“—” indicates byte lanes which will contain unused data.