Instruction Model
e200z3 Power Architecture Core Reference Manual, Rev. 2
Freescale Semiconductor
3-39
A
111111
––––– 11101 0
fmadd
Floating Multiply-Add
A
111111
––––– 11101 1
fmadd.
Floating Multiply-Add and record CR
A
111111
––––– 11110 0
fnmsub
Floating Negative Multiply-Subtract
A
111111
––––– 11110 1
fnmsub.
Floating Negative Multiply-Subtract and record CR
A
111111
––––– 11111 0
fnmadd
Floating Negative Multiply-Add
A
111111
––––– 11111 1
fnmadd.
Floating Negative Multiply-Add and record CR
X
111111
00000 00000 /
fcmpu
Floating Compare Unordered
X
111111
00000 01100 0
frsp
Floating Round to Single-Precision
X
111111
00000 01100 1
frsp.
Floating Round to Single-Precision and record CR
X
111111
00000 01110 0
fctiw
Floating Convert To Int Word
X
111111
00000 01110 1
fctiw.
Floating Convert To Int Word and record CR
X
111111
00000 01111 0
fctiwz
Floating Convert To Int Word with round to Zero
X
111111
00000 01111 1
fctiwz.
Floating Convert To Int Word with round to Zero and record CR
X
111111
00001 00000 /
fcmpo
Floating Compare Ordered
X
111111
00001 00110 0
mtfsb1
Move To FPSCR Bit 1
X
111111
00001 00110 1
mtfsb1.
Move To FPSCR Bit 1 and record CR
X
111111
00001 01000 0
fneg
Floating Negate
X
111111
00001 01000 1
fneg.
Floating Negate and record CR
X
111111
00010 00000 /
mcrfs
Move to Condition Register from FPSCR
X
111111
00010 00110 0
mtfsb0
Move To FPSCR Bit 0
X
111111
00010 00110 1
mtfsb0.
Move To FPSCR Bit 0 and record CR
X
111111
00010 01000 0
fmr
Floating Move Register
X
111111
00010 01000 1
fmr.
Floating Move Register and record CR
X
111111
00100 00110 0
mtfsfi
Move To FPSCR Field Immediate
X
111111
00100 00110 1
mtfsfi.
Move To FPSCR Field Immediate and record CR
X
111111
00100 01000 0
fnabs
Floating Negative Absolute Value
X
111111
00100 01000 1
fnabs.
Floating Negative Absolute Value and record CR
X
111111
01000 01000 0
fabs
Floating Absolute Value
Table 3-12. Instructions Sorted by Opcode (continued)
Format
Opcode
Mnemonic
Instruction
Primary
(Inst
0:5
)
Extended
(Inst
21:31
)
Legend:
-
Don’t care, usually part of an operand field
/
Reserved bit, invalid instruction form if encoded as 1
?
Allocated for implementation-dependent use. See User’ Manual for the implementation