Interrupts and Exceptions
e200z3 Power Architecture Core Reference Manual, Rev. 2
4-16
Freescale Semiconductor
IVOR4 is the vector offset register used by autovectored external input interrupts to determine the interrupt
handler location. The e200z3 also provides the capability to directly vector external input interrupts to
multiple handlers by allowing an external input interrupt request to be accompanied by a vector offset. The
p_voffset[0:11] input signals are used in place of the value in IVOR4 when an external input interrupt
request is not autovectored (p_avec_b negated when p_extint_b asserted).
4.6.6
Alignment Interrupt (IVOR5)
The e200z3 implements the alignment interrupt as defined by Book E. An alignment exception is
generated when any of the following occurs:
•
The operand of lmw or stmw is not word-aligned.
•
The operand of lwarx or stwcx. is not word-aligned.
•
Execution of dcbz is attempted
•
Execution is attempted of an SPE APU load or store instruction that is not properly aligned.
lists register settings when an alignment interrupt is taken.
4.6.7
Program Interrupt (IVOR6)
The e200z3 implements the program interrupt as defined by Book E. A program interrupt occurs when no
higher priority exception exists and one or more of the following exception conditions defined in Book E
occur:
•
Illegal instruction exception
•
Privileged instruction exception
•
Trap exception
•
Unimplemented operation exception
The e200z3 invokes an illegal instruction program exception on attempted execution of the following
instructions:
Table 4-15. Alignment Interrupt Register Settings
Register
Setting Description
SRR0
Set to the effective address of the excepting load/store instruction.
SRR1
Set to the contents of the MSR at the time of the interrupt
MSR
UCLE 0
SPE 0
WE
0
CE
—
EE
0
PR
0
FP
0
ME
—
FE0
0
DE
—
FE1
0
IS
0
DS
0
RI
—
ESR
[ST], [VLEMI
]
. All other bits cleared.
MCSR
Unchanged
DEAR
Set to the effective address of a byte of the load or store whose access caused the violation.
Vector
IVPR[32–47] || IVOR5[48–59] || 0b0000