9132A Service
MEMORY EMULATION POD
REFERENCE
Em)
ADDRESS
F<
COUBRRE.
EQUAL
VALID-COMPARE
COMPARATOR
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©
a
COUNT-ENABLE
BER
rooness
meri
I
bel
pa
[sYNCPULSE
©
AE
As
:
[SINC
uLsE,
CYCLE CLOCK
|
SOUT
>
ol
COUNTER
VALID
ADDRESS OR
A
DATASYNC-CLK
Figure 2-2.
Sync
Generation
the
comparator
are,
for example, ROMIPIN28POL, which chooses if the
existing pin is
high
or low
for
the compare,
and
ROMIPIN28DC-.
When
ROMIPIN28DC-
is low, the
comparator does not care about the state of
ROMIPIN28. This
type
of architecture
is
used throughout
the
comparator.
The output of
the
comparator
is
summed
by
U29,
an
8-input NAND gate.
Two other pins are input to
U29.
ROMISEL-,
an
output from ROM Module
1,
reports that
the
output enable
and
chip enable on the module are active.
ROMIDC-
is a
don’t care
signal
for
the
ROM1SEL-
line.
When
all
the pins
into U29 are active, the output of the comparator, COMPAREQ- (U29 pin
8),
goes
active
low.
The output of the comparator
is
sampled
by
BCYCLECLK- (BCYCLECLK-
is
explained
in
more detail further
on in this
section). BCYCLECLK-
is
a
clock
to
U21B,
an
AC74 Flip-Flop. Once the latch
is set, it
stays set using
the OR gate (U37C)
until
forced to clear
by a
reset or rearm signal
at U21
pin
13.
The comparator
signal
COMPAREQ- recognizes events occurring
at
the ROM Modules.
When COMPAREQ- is received
at
U21
and
BCYCLECLK-
is
active, the clock latch output goes
true.
Summary of Contents for 9132A
Page 53: ...9132A Service 9132A T B 10f 4 E 3 46 Figure 4 1 9132A Final Assembly...
Page 54: ...9132A Service DETAIL 9132A T8B 2 of 4 Figure 4 1 9132A Final Assembly cont 4 7...
Page 56: ...9132A Service MP16 POSITION 1 STRIPE 9132A T B 4 of 4 Figure 4 1 9132A Final Assembly cont 49...
Page 59: ...9132A Service Hout CEE LE RYT N Bk el FI Soho 9132A 1601 Figure 4 2 A1 Maln PCA 4 12...
Page 66: ...9132A Service 9132A 24 9132A 28 9132A 32 Figure 4 6 ROM Module Final Assembly 4 19...
Page 68: ...9132A Service 9132A 1603 Figure 4 7 AS ROM Module PCA 4 21...