7
DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
61
adc
%rd
,
%rs
Function
Addition with carry
Standard)
rd
←
rd
+
rs
+ C
Extension
1
) Unusable
Extension
2
) Unusable
Code
15
12
11
8
7
4
3
0
1
0
1
1
1
0
0
0
r s
r d
0xB8__
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Flag
IE C V Z N
–
↔
↔
↔
↔
|
|
|
|
Mode
Src: Register direct
%rs
=
%r0
to
%r15
Dst: Register direct
%rd
=
%r0
to
%r15
CLK
One cycle
Description
(
1
) Standard
adc
%rd
,
%rs
;
rd
←
rd
+
rs
+ C
The content of the
rs
register and C (carry) flag are added to the
rd
register.
(
2
) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the
“
d
”
bit.
Example
(
1
)
adc %r0,%r1
; r0 = r0 + r1 + C
(
2
) Addition of
64
-bit data
data
1
= {r
2
, r
1
}, data
2
= {r
4
, r
3
}, result = {r
2
, r
1
}
add %r1,%r3
; Addition of the low-order word
adc %r2,%r4
; Addition of the high-order word
