7
DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
157
slp
Function
SLEEP
Standard)
Place the processor in SLEEP mode
Extension
1
) Unusable
Extension
2
) Unusable
Code
15
12
11
8
7
4
3
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0x0040
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Flag
IE C V Z N
– – – – –
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Mode
–
CLK
Five cycles
Description
Places the processor in SLEEP mode for power saving.
Program execution is halted at the same time that the C
33
PE Core executes the
slp
instruction,
and the processor enters SLEEP mode.
SLEEP mode commonly turns off the C
33
PE Core and on-chip peripheral circuit operations,
thereby it significantly reduces the current consumption in comparison to the HALT mode.
Initial reset is one cause that can bring the processor out of SLEEP mode. Other causes depend on
the implementation of the clock control circuit outside the C
33
PE Core.
Initial reset, maskable external interrupts, NMI, and debug exceptions are commonly used for
canceling SLEEP mode.
The interrupt enable/disable status set in the processor does not affect the cancellation of SLEEP
mode even if an interrupt signal is used as the cancellation. In other words, interrupt signals are
able to cancel SLEEP mode even if the IE flag in PSR or the interrupt enable bits in the interrupt
controller (depending on the implementation) are set to disable interrupts.
When the processor is taken out of SLEEP mode using an interrupt that has been enabled (by the
interrupt controller and IE flag), the corresponding interrupt handler routine is executed. Therefore,
when the interrupt handler routine is terminated by the
reti
instruction, the processor returns to
the instruction next to
slp
.
When the interrupt has been disabled, the processor restarts the program from the instruction next
to
slp
after the processor is taken out of SLEEP mode.
Refer to the technical manual of each model for details of SLEEP mode.
Example
slp
; The processor is placed in SLEEP mode.
