5
INSTRUCTION SET
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
43
A delayed slot instruction is always executed regardless of whether the delayed branch instruction used is
conditional or unconditional and whether it branches.
In
“
non-delayed
”
branch instructions (those not followed by the extension
“
.d
”
), the instruction at the address
next to the branch instruction is not executed if the program branches; however, if it is a conditional jump and
the program does not branch, the instruction at the next address is executed as the one that follows the branch
instruction.
The return address saved to the stack by the
call.d
instruction becomes the address for the next instruction
following the delayed slot instruction, so that the delayed slot instruction is not executed when the program
returns from the subroutine.
No interrupts or exceptions occur in between a delayed branch instruction and a delayed slot instruction, as they
are masked out by hardware.
Application for leaf subroutines
The following shows an example application of delayed branch instructions for achieving a fast leaf subroutine
call.
Example:
jp.d SUB
;
Jumps to a subroutine by a delayed branch instruction
ld.w %r8,%pc
;
Loads the return address into a general-purpose register by
;
a delayed slot instruction
add %r1,%r2
;
Return address
:
:
SUB:
:
:
jp
%r8
;
Return
Note
: The
ld.w
%rd
,%pc
instruction must be executed as a delayed slot instruction. If it does not
follow a delayed branch instruction, the PC value that is loaded into the
rd
register may not be the
next instruction address to the
ld.w
instruction.
