2
REGISTERS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
7
2
.
4
Stack Pointer (SP)
Symbol
SP
Size
32 bits
Initial value
Indeterminate
Register name
Stack Pointer
R/W
R/W
The Stack Pointer (hereinafter referred to as the
“
SP
”
) is a
32
-bit register for holding the start address of the stack.
The stack is an area locatable at any place in the system RAM, the start address of which is set in the SP during the
initialization process. The
2
low-order bits of the SP are fixed to
0
and cannot be accessed for writing. Therefore,
the addresses specifiable by the SP are those that lie on word boundaries.
Word boundary address
0 0
0
1
2
31
Fixed
(read only)
Figure
2
.
4
.
1
Stack Pointer (SP)
2
.
4
.
1
About the Stack Area
The size of an area usable as the stack is limited according to the RAM size available for the system and the size of
the area occupied by ordinary RAM data. Care must be taken to prevent the stack and data area from overlapping.
Furthermore, as the SP becomes indeterminate when it is initialized upon reset,
“
last stack a
4
, with
2
low-
order bits =
0
”
must be written to the SP in the beginning part of the initialization routine. A load instruction may
be used to write this address. If an interrupt or exception occurs before the stack is set up, it is possible that the PC
or PSR will be saved to an indeterminate location, and normal operation of a program cannot be guaranteed. To
prevent such a problem, NMIs (nonmaskable interrupts) that cannot be controlled in software are masked out in
hardware until the SP is initialized.
2
.
4
.
2
SP Operation during Execution of
Push
-Related Instructions
In a
push
-related instruction, first the stack pointer indicated by the SP is decremented by
4
to move the SP to a
lower address location.
SP = SP -
4
Next, the content of the register specified in the
push
instruction is stored at the address pointed to by the SP.
rs
→
[SP]
Example:
pushn %r2
SP
31
0
0xFFFFFFFF
0x00000000
SP = SP - 12
31
0
0xFFFFFFFF
r2
r1
r0
0x00000000
Figure
2
.
4
.
2
.
1
SP and Stack (
1
)
