5
INSTRUCTION SET
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
41
(
2
) Absolute jump instructions
The absolute jump instruction
jp
%rb
causes the program to unconditionally branch to the location indicated
by the content of a specified general-purpose register (
rb
) as the absolute address. When the content of the
rb
register is loaded into the PC, its least significant bit is always made
0
.
31
W[31:1]
0
1
rb
X
0
Branch destination address
PC
(
3
) PC relative call instructions
The PC relative call instruction
call
sign8
is a subroutine call instruction that is useful for relocatable
programming, as it causes the program to unconditionally branch to a subroutine starting from an address that
is the same as the address indicated by the current PC (the address at which the branch instruction is located)
plus a signed displacement specified by the operand. During branching, the program saves the address of the
instruction next to the
call
instruction (for delayed branching, the address of the second instruction following
call) to the stack as the return address. When the
ret
instruction is executed at the end of the subroutine, this
address is loaded into the PC, and the program returns to it from the subroutine.
Note that because the instruction length is fixed to
16
bits, the least significant bit of the displacement is always
handled as
0
(
sign8
doubled), causing the program to branch to an even address.
As with the PC relative jump instructions, the specifiable displacement can be extended by the
ext
instruction.
For details on how to extend the displacement, refer to the
“
(
1
) PC relative jump instructions.
”
(
4
) Absolute call instructions
The absolute call instruction
call
%rb
causes the program to unconditionally call a subroutine starting from
the location indicated by the content of a specified general-purpose register (
rb
) as the absolute address. When
the content of the
rb
register is loaded into the PC, its least significant bit is always made
0
. (Refer to the
“
(
2
)
Absolute jump instructions.
”
)
(
5
) Software exceptions
The software exception
int
imm2
is an instruction that causes the software to generate an exception, by
which a specified exception handler routine can be executed. Four distinct exception handler routines can be
created, with the respective vector numbers specified by
imm2
. When a software exception occurs, the processor
saves the PSR and the instruction address next to
int
to the stack, and reads a specified vector from the vector
table in order to execute an exception handler routine. Therefore, to return from the exception handler routine,
the
reti
instruction must be used, as it restores the PSR as well as the PC from the stack. For details on the
software exception, refer to Section
6
.
3
,
“
Interrupts and Exceptions.
”
(
6
) Return instructions
The
ret
instruction, which is a return instruction for the
call
instruction, loads the saved return address from
the stack into the PC as it terminates the subroutine. Therefore, the value of the SP when the
ret
instruction is
executed must be the same as when the subroutine was executed (i.e., one that indicates the return address).
The
reti
instruction is a return instruction for the exception handler routine. Since the PSR is saved to the
stack along with the return address in exception handling, the content of the PSR must be restored from the
stack using the
reti
instruction. In the
reti
instruction, the PC and the PSR are read out of the stack in that
order. As in the case of the
ret
instruction, the value of the SP when the
reti
instruction is executed must be
the same as when the subroutine was executed.
(
7
) Debug exceptions
The
brk
and
retd
instructions are used to call a debug exception handler routine, and to return from that
routine. Since these instructions are basically provided for the debug firmware, please do not use them in
application programs. For details on the functionality of these instructions, refer to Section
6
.
5
,
“
Debug
Circuit.
”
Differences from the C
33
STD Core CPU
Register indirect relative branch instructions have been added.