7
DETAILS OF INSTRUCTIONS
116
EPSON
S1C33 FAMILY C33 PE CORE MANUAL
ld.uh
%rd
, [
%rb
]+
Function
Unsigned halfword data transfer
Standard)
rd
(
15
:
0
)
←
H[
rb
],
rd
(
31
:
16
)
←
0
,
rb
←
rb
+
2
Extension
1
) Unusable
Extension
2
) Unusable
Code
15
12
11
8
7
4
3
0
0
0
1
0
1
1
0
1
r b
r d
0x2D__
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Flag
IE C V Z N
– – – – –
|
|
|
|
Mode
Src: Register indirect with post-increment
%rb
=
%r0
to
%r15
Dst: Register direct
%rd
=
%r0
to
%r15
CLK
Two cycles
Description
The halfword data in the specified memory location is transferred to the
rd
register after being zero-
extended to
32
bits. The
rb
register contains the memory address to be accessed. Following data
transfer, the address in the
rb
register is incremented by
2
.
Caution
(
1
) The
rb
register must specify a halfword boundary address (least significant bit =
0
). Specifying
an odd address causes an address misaligned exception.
(
2
) If the same register is specified for
rd
and
rb
, the incremented address after transferring data is
loaded to the
rd
register.
