Epson EPL-9000, Service Manual

Page: 78 / 162

Service
2.2.1.1 Reset Circuit
The entire system (the CPU and the external devices) can be initialized if the RESET signal (CPU
pin 113) are active
This circuit uses an to monitor the supply voltage if
a voltage level less than 4.25 V is detected. reset time is approximately 128 ms.
L
+
OUT
c
4
Figure 2-38. Reset Circuit
2.2.1.2 Bus Circuit
The CPU outputs the R/W (read/write) signal, AS (address strobe) signal, and the BE(),
BE1, BE2, and BE3 signals (byte to the The uses these signals
to generate the RD (read strobe) signal, WR (write strobe) signal, and READY signal.
(ICI) ●
- u
—
AS
CPU
BE()-3
WR
Bus Bus
Figure 2-39. Bus Control Circuit
2-26
Rev.