Embedian SMARC-iMX8M Series, User Manual, Page: 82 / 174

Embedian, Inc.
82
SMARC-iMX8M Computer on Module User’s Manual v.1.0
Note:
All I2C bus and are operated at 1.8V. The slave devices and their address
details are listed in the following table:
# Device Description Address
(7‐bit)
Address
(8‐bit) Notes
Read Write
I2C_PM (I2C1) Bus
1 Pericom
PI6CFGL201BZDIE PCIe Gen 1‐2‐3
Clock Generator 0x68 0xD1 0xD0 Clock Generator for
PCIe Lane A
2 Pericom
PI6CFGL201BZDIE PCIe Gen 1‐2‐3
Clock Generator 0x6A 0xD5 0XD4 Clock Generator for
PCIe Lane B
2 NXP
MC34PF4210A1ES
PMIC 0x08 0x01 0x00 PMIC
3 Seiko S‐35390A Real‐time clock
IC 0x30 0x61 0x60 Real‐Time Clock
I2C_GP
1 On
Semiconductor
CAT24C32 EEPROM 0x50 0xA1 0xA0 General purpose
parameter
EEPROM, Serial
number, etc in
PICMG EEEP format
I2C_LCD
1 TI
SN65DSI84 MIPI_DSI to LVDS
Bridge 0x2C 0x59 0x58 MIPI_DSI to LVDS
Bridge IC
Note:
On‐module EEPROM has been moved from I2C_PM to I2C_GP at SMARC 2.0
specification .