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Table 4–20 End Actions Register Descriptions
Entry
Content
Offset
SYSFLT
JXD System Fault Register
0
SYSADR
JXD System Error Address Register
4
JCSR
JXD Control and Status Register
8
JDIAG_P
JXD Diagnostic Error Register - primary rail
12
JDIAG_M
JXD Diagnostic Error Register - mirror rail
16
MMBERR0
JXD ROM BUS MMB Error Register 0
20
MMBERR1
JXD ROM BUS MMB Error Register 1
24
ATMERR0
JXD ROM BUS ATM Error Register
28
DMASTS
DMA Status Register
32
DMAADR
DMA Error Address Register
36
SERCRS
Serial Cross-Link Control and Status Register
40
SERMODE
Serial Cross-Link Mode Register
44
SAVPC
CPU Saved PC - Zone A
48
SAVPSL
CPU Saved PSL
52
ECR
CPU EBox Control Register
56
BIU_CTL
CPU BIU Control Register
60
BC_TAG
CPU B-cache Error Tag
64
BIU_STS
CPU BIU Status Register
68
BIU_ADDR
CPU BIU Address Register
72
FIL_SYN
CPU Fill Syndrome
76
FIL_ADDR
CPU Fill Address
80
VMAR
CPU VIC Memory Address Register
84
ICSR
CPU IBox Control and Status Register
88
TBADR
CPU MBox TB Parity Address
92
TBSTS
CPU MBox TB Parity Status
96
PCSTS
CPU P-cache Status Register
100
PCCTL
CPU P-cache Control Register
104
CONSOLE_STS
System Console Duplex Compatibility Status
108
DIAG_STS
System Diagnostics Status Longword
112
4.4.5.3 End Action Timeouts
This data is provided when a zone or CPU which was temporarily removed from
service due to a fault fails to communicate through the interzone communication
service (IZC) to the remaining zone after running diagnostics. In many cases,
such a situation results in the EHS declaring a solid error for the CPU or zone in
this error log.
Error Handling and Analysis 4–29