Hercules III User Manual Rev A.2
www.diamondsystems.com
Page
52
FIFO Depth MSB: Base+11 (Read)
Bit:
7
6
5
4
3
2
1
0
Name:
-
-
-
FD12-FD8
FD12-FD8 Current FIFO depth MSB.
The FIFO depth registers indicates the current depth, or number of bytes, in the FIFO. The depth is
reset to 0 when a FIFORST command occurs. It increments by one each time a byte from the A/D
converter is inserted into the FIFO and decrements by one each time a byte is read from the FIFO. FD,
therefore, increments/decrements by two for a full A/D sample write or read operation. If a 16-bit read
operation occurs, FD decrements by 2 after the operation.
Configuration: Base+12 (Read/Write)
Bit:
7
6
5
4
3
2
1
0
Name:
LED
SINGLE DIOCTR1 DIOCTR0
SCINT
CLKSRC1 CLKFRQ1 CLKFRQ0
LED
Active high, a simple status bit used to drive external LED. Default is high upon power-up.
SINGLE Indicates whether to use the global A/D input range or the individual input range table for A/D
conversions.
0 = use global setting for all channels.
1 = use the programmed settings for each channel.
DIOCTR1 I/O connector DIOE7-4 pins signal selection:
0 = digital I/O lines DIOE7-4 appear on DIOE7-4 pins of I/O connectors.
1 = counter signals appear on DIOE7-4 pins of I/O connectors.
DIOCTR0 I/O connector DIOE3-0 pins signal selection:
0 = digital I/O lines DIOE3-0 appear on DIOE3-0 pins of I/O connectors.
1 = PWM signals appear on DIOE3-0 pins of I/O connectors.
SCINT
A/D scan interval selection:
0 = 4µS
1 = 9µS
CLKSRC1 Clock source for counter 1:
0 = internal (see CLKFRQ1 below).
1 = external (J8, pin 41, EXTTRIG).
CLKFRQ1 Internal clock frequency for counter 1:
0 = 10MHz
1 = 100 KHz
CLKFRQ0 Internal clock frequency for counter 0:
0 = 10MHz
1 = 100 KHz